mirror of
https://github.com/torvalds/linux.git
synced 2024-11-23 04:31:50 +00:00
Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm: [ARM] 3762/1: Fix ptrace cache coherency bug for ARM1136 VIPT nonaliasing Harvard caches [ARM] 3765/1: S3C24XX: cleanup include/asm-arm/arch-s3c2410/dma.h [ARM] 3764/1: S3C24XX: change type naming to kernel style [ARM] 3763/1: add both rtcs to csb337 defconfig [ARM] Fix ARM __raw_read_trylock() implementation [ARM] 3750/3: Fix double VFP emulation for EABI kernels
This commit is contained in:
Linus Torvalds
commit
e694420258
@ -621,9 +621,8 @@ CONFIG_AT91_WATCHDOG=y
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# USB-based Watchdog Cards
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#
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# CONFIG_USBPCWATCHDOG is not set
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# CONFIG_HW_RANDOM is not set
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# CONFIG_NVRAM is not set
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CONFIG_RTC=y
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# CONFIG_AT91_RTC is not set
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# CONFIG_DTLK is not set
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# CONFIG_R3964 is not set
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@ -956,9 +955,41 @@ CONFIG_USB_AT91=y
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CONFIG_MMC=y
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# CONFIG_MMC_DEBUG is not set
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CONFIG_MMC_BLOCK=y
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# CONFIG_MMC_WBSD is not set
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CONFIG_MMC_AT91RM9200=y
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#
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# Real Time Clock
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#
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CONFIG_RTC_LIB=y
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CONFIG_RTC_CLASS=y
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CONFIG_RTC_HCTOSYS=y
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CONFIG_RTC_HCTOSYS_DEVICE="rtc1"
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#
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# RTC interfaces
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#
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# CONFIG_RTC_INTF_SYSFS is not set
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CONFIG_RTC_INTF_PROC=y
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CONFIG_RTC_INTF_DEV=y
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# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
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#
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# RTC drivers
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#
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# CONFIG_RTC_DRV_X1205 is not set
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CONFIG_RTC_DRV_DS1307=y
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# CONFIG_RTC_DRV_DS1553 is not set
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# CONFIG_RTC_DRV_ISL1208 is not set
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# CONFIG_RTC_DRV_DS1672 is not set
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# CONFIG_RTC_DRV_DS1742 is not set
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# CONFIG_RTC_DRV_PCF8563 is not set
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# CONFIG_RTC_DRV_PCF8583 is not set
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# CONFIG_RTC_DRV_RS5C372 is not set
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# CONFIG_RTC_DRV_M48T86 is not set
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CONFIG_RTC_DRV_AT91=y
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# CONFIG_RTC_DRV_TEST is not set
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# CONFIG_RTC_DRV_V3020 is not set
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#
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# File systems
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#
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@ -60,7 +60,7 @@ static void __iomem *dma_base;
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static kmem_cache_t *dma_kmem;
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/* dma channel state information */
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s3c2410_dma_chan_t s3c2410_chans[S3C2410_DMA_CHANNELS];
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struct s3c2410_dma_chan s3c2410_chans[S3C2410_DMA_CHANNELS];
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/* debugging functions */
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@ -74,7 +74,7 @@ s3c2410_dma_chan_t s3c2410_chans[S3C2410_DMA_CHANNELS];
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#define dma_wrreg(chan, reg, val) writel((val), (chan)->regs + (reg))
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#else
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static inline void
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dma_wrreg(s3c2410_dma_chan_t *chan, int reg, unsigned long val)
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dma_wrreg(struct s3c2410_dma_chan *chan, int reg, unsigned long val)
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{
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pr_debug("writing %08x to register %08x\n",(unsigned int)val,reg);
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writel(val, dma_regaddr(chan, reg));
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@ -102,7 +102,7 @@ struct s3c2410_dma_regstate {
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*/
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static void
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dmadbg_capture(s3c2410_dma_chan_t *chan, struct s3c2410_dma_regstate *regs)
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dmadbg_capture(struct s3c2410_dma_chan *chan, struct s3c2410_dma_regstate *regs)
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{
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regs->dcsrc = dma_rdreg(chan, S3C2410_DMA_DCSRC);
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regs->disrc = dma_rdreg(chan, S3C2410_DMA_DISRC);
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@ -112,7 +112,7 @@ dmadbg_capture(s3c2410_dma_chan_t *chan, struct s3c2410_dma_regstate *regs)
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}
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static void
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dmadbg_dumpregs(const char *fname, int line, s3c2410_dma_chan_t *chan,
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dmadbg_dumpregs(const char *fname, int line, struct s3c2410_dma_chan *chan,
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struct s3c2410_dma_regstate *regs)
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{
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printk(KERN_DEBUG "dma%d: %s:%d: DCSRC=%08lx, DISRC=%08lx, DSTAT=%08lx DMT=%02lx, DCON=%08lx\n",
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@ -122,7 +122,7 @@ dmadbg_dumpregs(const char *fname, int line, s3c2410_dma_chan_t *chan,
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}
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static void
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dmadbg_showchan(const char *fname, int line, s3c2410_dma_chan_t *chan)
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dmadbg_showchan(const char *fname, int line, struct s3c2410_dma_chan *chan)
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{
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struct s3c2410_dma_regstate state;
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@ -136,7 +136,7 @@ dmadbg_showchan(const char *fname, int line, s3c2410_dma_chan_t *chan)
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}
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static void
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dmadbg_showregs(const char *fname, int line, s3c2410_dma_chan_t *chan)
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dmadbg_showregs(const char *fname, int line, struct s3c2410_dma_chan *chan)
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{
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struct s3c2410_dma_regstate state;
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@ -164,7 +164,7 @@ dmadbg_showregs(const char *fname, int line, s3c2410_dma_chan_t *chan)
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*/
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static void
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s3c2410_dma_stats_timeout(s3c2410_dma_stats_t *stats, int val)
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s3c2410_dma_stats_timeout(struct s3c2410_dma_stats *stats, int val)
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{
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if (stats == NULL)
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return;
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@ -183,7 +183,7 @@ s3c2410_dma_stats_timeout(s3c2410_dma_stats_t *stats, int val)
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*/
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static int
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s3c2410_dma_waitforload(s3c2410_dma_chan_t *chan, int line)
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s3c2410_dma_waitforload(struct s3c2410_dma_chan *chan, int line)
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{
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int timeout = chan->load_timeout;
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int took;
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@ -230,8 +230,8 @@ s3c2410_dma_waitforload(s3c2410_dma_chan_t *chan, int line)
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*/
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static inline int
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s3c2410_dma_loadbuffer(s3c2410_dma_chan_t *chan,
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s3c2410_dma_buf_t *buf)
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s3c2410_dma_loadbuffer(struct s3c2410_dma_chan *chan,
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struct s3c2410_dma_buf *buf)
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{
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unsigned long reload;
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@ -304,7 +304,7 @@ s3c2410_dma_loadbuffer(s3c2410_dma_chan_t *chan,
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*/
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static void
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s3c2410_dma_call_op(s3c2410_dma_chan_t *chan, s3c2410_chan_op_t op)
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s3c2410_dma_call_op(struct s3c2410_dma_chan *chan, enum s3c2410_chan_op op)
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{
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if (chan->op_fn != NULL) {
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(chan->op_fn)(chan, op);
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@ -318,8 +318,8 @@ s3c2410_dma_call_op(s3c2410_dma_chan_t *chan, s3c2410_chan_op_t op)
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*/
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static inline void
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s3c2410_dma_buffdone(s3c2410_dma_chan_t *chan, s3c2410_dma_buf_t *buf,
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s3c2410_dma_buffresult_t result)
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s3c2410_dma_buffdone(struct s3c2410_dma_chan *chan, struct s3c2410_dma_buf *buf,
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enum s3c2410_dma_buffresult result)
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{
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pr_debug("callback_fn=%p, buf=%p, id=%p, size=%d, result=%d\n",
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chan->callback_fn, buf, buf->id, buf->size, result);
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@ -334,7 +334,7 @@ s3c2410_dma_buffdone(s3c2410_dma_chan_t *chan, s3c2410_dma_buf_t *buf,
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* start a dma channel going
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*/
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static int s3c2410_dma_start(s3c2410_dma_chan_t *chan)
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static int s3c2410_dma_start(struct s3c2410_dma_chan *chan)
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{
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unsigned long tmp;
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unsigned long flags;
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@ -430,7 +430,7 @@ static int s3c2410_dma_start(s3c2410_dma_chan_t *chan)
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*/
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static int
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s3c2410_dma_canload(s3c2410_dma_chan_t *chan)
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s3c2410_dma_canload(struct s3c2410_dma_chan *chan)
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{
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if (chan->load_state == S3C2410_DMALOAD_NONE ||
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chan->load_state == S3C2410_DMALOAD_1RUNNING)
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@ -460,8 +460,8 @@ s3c2410_dma_canload(s3c2410_dma_chan_t *chan)
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int s3c2410_dma_enqueue(unsigned int channel, void *id,
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dma_addr_t data, int size)
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{
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s3c2410_dma_chan_t *chan = &s3c2410_chans[channel];
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s3c2410_dma_buf_t *buf;
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struct s3c2410_dma_chan *chan = &s3c2410_chans[channel];
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struct s3c2410_dma_buf *buf;
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unsigned long flags;
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check_channel(channel);
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@ -540,7 +540,7 @@ int s3c2410_dma_enqueue(unsigned int channel, void *id,
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EXPORT_SYMBOL(s3c2410_dma_enqueue);
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static inline void
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s3c2410_dma_freebuf(s3c2410_dma_buf_t *buf)
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s3c2410_dma_freebuf(struct s3c2410_dma_buf *buf)
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{
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int magicok = (buf->magic == BUF_MAGIC);
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@ -560,7 +560,7 @@ s3c2410_dma_freebuf(s3c2410_dma_buf_t *buf)
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*/
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static inline void
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s3c2410_dma_lastxfer(s3c2410_dma_chan_t *chan)
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s3c2410_dma_lastxfer(struct s3c2410_dma_chan *chan)
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{
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pr_debug("dma%d: s3c2410_dma_lastxfer: load_state %d\n",
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chan->number, chan->load_state);
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@ -601,8 +601,8 @@ s3c2410_dma_lastxfer(s3c2410_dma_chan_t *chan)
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static irqreturn_t
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s3c2410_dma_irq(int irq, void *devpw, struct pt_regs *regs)
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{
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s3c2410_dma_chan_t *chan = (s3c2410_dma_chan_t *)devpw;
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s3c2410_dma_buf_t *buf;
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struct s3c2410_dma_chan *chan = (struct s3c2410_dma_chan *)devpw;
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struct s3c2410_dma_buf *buf;
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buf = chan->curr;
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@ -731,10 +731,10 @@ s3c2410_dma_irq(int irq, void *devpw, struct pt_regs *regs)
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* get control of an dma channel
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*/
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int s3c2410_dma_request(unsigned int channel, s3c2410_dma_client_t *client,
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int s3c2410_dma_request(unsigned int channel, struct s3c2410_dma_client *client,
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void *dev)
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{
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s3c2410_dma_chan_t *chan = &s3c2410_chans[channel];
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struct s3c2410_dma_chan *chan = &s3c2410_chans[channel];
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unsigned long flags;
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int err;
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@ -807,9 +807,9 @@ EXPORT_SYMBOL(s3c2410_dma_request);
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* allowed to go through.
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*/
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int s3c2410_dma_free(dmach_t channel, s3c2410_dma_client_t *client)
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int s3c2410_dma_free(dmach_t channel, struct s3c2410_dma_client *client)
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{
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s3c2410_dma_chan_t *chan = &s3c2410_chans[channel];
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struct s3c2410_dma_chan *chan = &s3c2410_chans[channel];
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unsigned long flags;
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check_channel(channel);
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@ -846,7 +846,7 @@ int s3c2410_dma_free(dmach_t channel, s3c2410_dma_client_t *client)
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EXPORT_SYMBOL(s3c2410_dma_free);
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static int s3c2410_dma_dostop(s3c2410_dma_chan_t *chan)
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static int s3c2410_dma_dostop(struct s3c2410_dma_chan *chan)
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{
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unsigned long tmp;
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unsigned long flags;
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@ -880,7 +880,7 @@ static int s3c2410_dma_dostop(s3c2410_dma_chan_t *chan)
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return 0;
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}
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void s3c2410_dma_waitforstop(s3c2410_dma_chan_t *chan)
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void s3c2410_dma_waitforstop(struct s3c2410_dma_chan *chan)
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{
|
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unsigned long tmp;
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unsigned int timeout = 0x10000;
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@ -901,9 +901,9 @@ void s3c2410_dma_waitforstop(s3c2410_dma_chan_t *chan)
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* stop the channel, and remove all current and pending transfers
|
||||
*/
|
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|
||||
static int s3c2410_dma_flush(s3c2410_dma_chan_t *chan)
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static int s3c2410_dma_flush(struct s3c2410_dma_chan *chan)
|
||||
{
|
||||
s3c2410_dma_buf_t *buf, *next;
|
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struct s3c2410_dma_buf *buf, *next;
|
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unsigned long flags;
|
||||
|
||||
pr_debug("%s: chan %p (%d)\n", __FUNCTION__, chan, chan->number);
|
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@ -958,7 +958,7 @@ static int s3c2410_dma_flush(s3c2410_dma_chan_t *chan)
|
||||
}
|
||||
|
||||
int
|
||||
s3c2410_dma_started(s3c2410_dma_chan_t *chan)
|
||||
s3c2410_dma_started(struct s3c2410_dma_chan *chan)
|
||||
{
|
||||
unsigned long flags;
|
||||
|
||||
@ -995,9 +995,9 @@ s3c2410_dma_started(s3c2410_dma_chan_t *chan)
|
||||
}
|
||||
|
||||
int
|
||||
s3c2410_dma_ctrl(dmach_t channel, s3c2410_chan_op_t op)
|
||||
s3c2410_dma_ctrl(dmach_t channel, enum s3c2410_chan_op op)
|
||||
{
|
||||
s3c2410_dma_chan_t *chan = &s3c2410_chans[channel];
|
||||
struct s3c2410_dma_chan *chan = &s3c2410_chans[channel];
|
||||
|
||||
check_channel(channel);
|
||||
|
||||
@ -1046,7 +1046,7 @@ int s3c2410_dma_config(dmach_t channel,
|
||||
int xferunit,
|
||||
int dcon)
|
||||
{
|
||||
s3c2410_dma_chan_t *chan = &s3c2410_chans[channel];
|
||||
struct s3c2410_dma_chan *chan = &s3c2410_chans[channel];
|
||||
|
||||
pr_debug("%s: chan=%d, xfer_unit=%d, dcon=%08x\n",
|
||||
__FUNCTION__, channel, xferunit, dcon);
|
||||
@ -1086,7 +1086,7 @@ EXPORT_SYMBOL(s3c2410_dma_config);
|
||||
|
||||
int s3c2410_dma_setflags(dmach_t channel, unsigned int flags)
|
||||
{
|
||||
s3c2410_dma_chan_t *chan = &s3c2410_chans[channel];
|
||||
struct s3c2410_dma_chan *chan = &s3c2410_chans[channel];
|
||||
|
||||
check_channel(channel);
|
||||
|
||||
@ -1106,7 +1106,7 @@ EXPORT_SYMBOL(s3c2410_dma_setflags);
|
||||
|
||||
int s3c2410_dma_set_opfn(dmach_t channel, s3c2410_dma_opfn_t rtn)
|
||||
{
|
||||
s3c2410_dma_chan_t *chan = &s3c2410_chans[channel];
|
||||
struct s3c2410_dma_chan *chan = &s3c2410_chans[channel];
|
||||
|
||||
check_channel(channel);
|
||||
|
||||
@ -1121,7 +1121,7 @@ EXPORT_SYMBOL(s3c2410_dma_set_opfn);
|
||||
|
||||
int s3c2410_dma_set_buffdone_fn(dmach_t channel, s3c2410_dma_cbfn_t rtn)
|
||||
{
|
||||
s3c2410_dma_chan_t *chan = &s3c2410_chans[channel];
|
||||
struct s3c2410_dma_chan *chan = &s3c2410_chans[channel];
|
||||
|
||||
check_channel(channel);
|
||||
|
||||
@ -1149,11 +1149,11 @@ EXPORT_SYMBOL(s3c2410_dma_set_buffdone_fn);
|
||||
*/
|
||||
|
||||
int s3c2410_dma_devconfig(int channel,
|
||||
s3c2410_dmasrc_t source,
|
||||
enum s3c2410_dmasrc source,
|
||||
int hwcfg,
|
||||
unsigned long devaddr)
|
||||
{
|
||||
s3c2410_dma_chan_t *chan = &s3c2410_chans[channel];
|
||||
struct s3c2410_dma_chan *chan = &s3c2410_chans[channel];
|
||||
|
||||
check_channel(channel);
|
||||
|
||||
@ -1200,7 +1200,7 @@ EXPORT_SYMBOL(s3c2410_dma_devconfig);
|
||||
|
||||
int s3c2410_dma_getposition(dmach_t channel, dma_addr_t *src, dma_addr_t *dst)
|
||||
{
|
||||
s3c2410_dma_chan_t *chan = &s3c2410_chans[channel];
|
||||
struct s3c2410_dma_chan *chan = &s3c2410_chans[channel];
|
||||
|
||||
check_channel(channel);
|
||||
|
||||
@ -1222,7 +1222,7 @@ EXPORT_SYMBOL(s3c2410_dma_getposition);
|
||||
|
||||
static int s3c2410_dma_suspend(struct sys_device *dev, pm_message_t state)
|
||||
{
|
||||
s3c2410_dma_chan_t *cp = container_of(dev, s3c2410_dma_chan_t, dev);
|
||||
struct s3c2410_dma_chan *cp = container_of(dev, struct s3c2410_dma_chan, dev);
|
||||
|
||||
printk(KERN_DEBUG "suspending dma channel %d\n", cp->number);
|
||||
|
||||
@ -1262,7 +1262,7 @@ static struct sysdev_class dma_sysclass = {
|
||||
|
||||
static void s3c2410_dma_cache_ctor(void *p, kmem_cache_t *c, unsigned long f)
|
||||
{
|
||||
memset(p, 0, sizeof(s3c2410_dma_buf_t));
|
||||
memset(p, 0, sizeof(struct s3c2410_dma_buf));
|
||||
}
|
||||
|
||||
|
||||
@ -1270,7 +1270,7 @@ static void s3c2410_dma_cache_ctor(void *p, kmem_cache_t *c, unsigned long f)
|
||||
|
||||
static int __init s3c2410_init_dma(void)
|
||||
{
|
||||
s3c2410_dma_chan_t *cp;
|
||||
struct s3c2410_dma_chan *cp;
|
||||
int channel;
|
||||
int ret;
|
||||
|
||||
@ -1288,7 +1288,7 @@ static int __init s3c2410_init_dma(void)
|
||||
goto err;
|
||||
}
|
||||
|
||||
dma_kmem = kmem_cache_create("dma_desc", sizeof(s3c2410_dma_buf_t), 0,
|
||||
dma_kmem = kmem_cache_create("dma_desc", sizeof(struct s3c2410_dma_buf), 0,
|
||||
SLAB_HWCACHE_ALIGN,
|
||||
s3c2410_dma_cache_ctor, NULL);
|
||||
|
||||
@ -1301,7 +1301,7 @@ static int __init s3c2410_init_dma(void)
|
||||
for (channel = 0; channel < S3C2410_DMA_CHANNELS; channel++) {
|
||||
cp = &s3c2410_chans[channel];
|
||||
|
||||
memset(cp, 0, sizeof(s3c2410_dma_chan_t));
|
||||
memset(cp, 0, sizeof(struct s3c2410_dma_chan));
|
||||
|
||||
/* dma channel irqs are in order.. */
|
||||
cp->number = channel;
|
||||
|
||||
@ -87,6 +87,32 @@ void flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsig
|
||||
if (cache_is_vipt_aliasing())
|
||||
flush_pfn_alias(pfn, user_addr);
|
||||
}
|
||||
|
||||
void flush_ptrace_access(struct vm_area_struct *vma, struct page *page,
|
||||
unsigned long uaddr, void *kaddr,
|
||||
unsigned long len, int write)
|
||||
{
|
||||
if (cache_is_vivt()) {
|
||||
if (cpu_isset(smp_processor_id(), vma->vm_mm->cpu_vm_mask)) {
|
||||
unsigned long addr = (unsigned long)kaddr;
|
||||
__cpuc_coherent_kern_range(addr, addr + len);
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
if (cache_is_vipt_aliasing()) {
|
||||
flush_pfn_alias(page_to_pfn(page), uaddr);
|
||||
return;
|
||||
}
|
||||
|
||||
/* VIPT non-aliasing cache */
|
||||
if (cpu_isset(smp_processor_id(), vma->vm_mm->cpu_vm_mask) &&
|
||||
vma->vm_flags | VM_EXEC) {
|
||||
unsigned long addr = (unsigned long)kaddr;
|
||||
/* only flushing the kernel mapping on non-aliasing VIPT */
|
||||
__cpuc_coherent_kern_range(addr, addr + len);
|
||||
}
|
||||
}
|
||||
#else
|
||||
#define flush_pfn_alias(pfn,vaddr) do { } while (0)
|
||||
#endif
|
||||
|
||||
@ -156,7 +156,7 @@ struct vfp_single {
|
||||
};
|
||||
|
||||
extern s32 vfp_get_float(unsigned int reg);
|
||||
extern void vfp_put_float(unsigned int reg, s32 val);
|
||||
extern void vfp_put_float(s32 val, unsigned int reg);
|
||||
|
||||
/*
|
||||
* VFP_SINGLE_MANTISSA_BITS - number of bits in the mantissa
|
||||
@ -267,7 +267,7 @@ struct vfp_double {
|
||||
*/
|
||||
#define VFP_REG_ZERO 16
|
||||
extern u64 vfp_get_double(unsigned int reg);
|
||||
extern void vfp_put_double(unsigned int reg, u64 val);
|
||||
extern void vfp_put_double(u64 val, unsigned int reg);
|
||||
|
||||
#define VFP_DOUBLE_MANTISSA_BITS (52)
|
||||
#define VFP_DOUBLE_EXPONENT_BITS (11)
|
||||
@ -341,12 +341,6 @@ static inline int vfp_double_type(struct vfp_double *s)
|
||||
|
||||
u32 vfp_double_normaliseround(int dd, struct vfp_double *vd, u32 fpscr, u32 exceptions, const char *func);
|
||||
|
||||
/*
|
||||
* System registers
|
||||
*/
|
||||
extern u32 vfp_get_sys(unsigned int reg);
|
||||
extern void vfp_put_sys(unsigned int reg, u32 val);
|
||||
|
||||
u32 vfp_estimate_sqrt_significand(u32 exponent, u32 significand);
|
||||
|
||||
/*
|
||||
|
||||
@ -195,7 +195,7 @@ u32 vfp_double_normaliseround(int dd, struct vfp_double *vd, u32 fpscr, u32 exce
|
||||
s64 d = vfp_double_pack(vd);
|
||||
pr_debug("VFP: %s: d(d%d)=%016llx exceptions=%08x\n", func,
|
||||
dd, d, exceptions);
|
||||
vfp_put_double(dd, d);
|
||||
vfp_put_double(d, dd);
|
||||
}
|
||||
return exceptions;
|
||||
}
|
||||
@ -250,19 +250,19 @@ vfp_propagate_nan(struct vfp_double *vdd, struct vfp_double *vdn,
|
||||
*/
|
||||
static u32 vfp_double_fabs(int dd, int unused, int dm, u32 fpscr)
|
||||
{
|
||||
vfp_put_double(dd, vfp_double_packed_abs(vfp_get_double(dm)));
|
||||
vfp_put_double(vfp_double_packed_abs(vfp_get_double(dm)), dd);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static u32 vfp_double_fcpy(int dd, int unused, int dm, u32 fpscr)
|
||||
{
|
||||
vfp_put_double(dd, vfp_get_double(dm));
|
||||
vfp_put_double(vfp_get_double(dm), dd);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static u32 vfp_double_fneg(int dd, int unused, int dm, u32 fpscr)
|
||||
{
|
||||
vfp_put_double(dd, vfp_double_packed_negate(vfp_get_double(dm)));
|
||||
vfp_put_double(vfp_double_packed_negate(vfp_get_double(dm)), dd);
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -287,7 +287,7 @@ static u32 vfp_double_fsqrt(int dd, int unused, int dm, u32 fpscr)
|
||||
vdp = &vfp_double_default_qnan;
|
||||
ret = FPSCR_IOC;
|
||||
}
|
||||
vfp_put_double(dd, vfp_double_pack(vdp));
|
||||
vfp_put_double(vfp_double_pack(vdp), dd);
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -476,7 +476,7 @@ static u32 vfp_double_fcvts(int sd, int unused, int dm, u32 fpscr)
|
||||
return vfp_single_normaliseround(sd, &vsd, fpscr, exceptions, "fcvts");
|
||||
|
||||
pack_nan:
|
||||
vfp_put_float(sd, vfp_single_pack(&vsd));
|
||||
vfp_put_float(vfp_single_pack(&vsd), sd);
|
||||
return exceptions;
|
||||
}
|
||||
|
||||
@ -573,7 +573,7 @@ static u32 vfp_double_ftoui(int sd, int unused, int dm, u32 fpscr)
|
||||
|
||||
pr_debug("VFP: ftoui: d(s%d)=%08x exceptions=%08x\n", sd, d, exceptions);
|
||||
|
||||
vfp_put_float(sd, d);
|
||||
vfp_put_float(d, sd);
|
||||
|
||||
return exceptions;
|
||||
}
|
||||
@ -648,7 +648,7 @@ static u32 vfp_double_ftosi(int sd, int unused, int dm, u32 fpscr)
|
||||
|
||||
pr_debug("VFP: ftosi: d(s%d)=%08x exceptions=%08x\n", sd, d, exceptions);
|
||||
|
||||
vfp_put_float(sd, (s32)d);
|
||||
vfp_put_float((s32)d, sd);
|
||||
|
||||
return exceptions;
|
||||
}
|
||||
@ -1084,7 +1084,7 @@ static u32 vfp_double_fdiv(int dd, int dn, int dm, u32 fpscr)
|
||||
vdn_nan:
|
||||
exceptions = vfp_propagate_nan(&vdd, &vdn, &vdm, fpscr);
|
||||
pack:
|
||||
vfp_put_double(dd, vfp_double_pack(&vdd));
|
||||
vfp_put_double(vfp_double_pack(&vdd), dd);
|
||||
return exceptions;
|
||||
|
||||
vdm_nan:
|
||||
@ -1104,7 +1104,7 @@ static u32 vfp_double_fdiv(int dd, int dn, int dm, u32 fpscr)
|
||||
goto pack;
|
||||
|
||||
invalid:
|
||||
vfp_put_double(dd, vfp_double_pack(&vfp_double_default_qnan));
|
||||
vfp_put_double(vfp_double_pack(&vfp_double_default_qnan), dd);
|
||||
return FPSCR_IOC;
|
||||
}
|
||||
|
||||
|
||||
@ -178,12 +178,12 @@ vfp_get_float:
|
||||
|
||||
.globl vfp_put_float
|
||||
vfp_put_float:
|
||||
add pc, pc, r0, lsl #3
|
||||
add pc, pc, r1, lsl #3
|
||||
mov r0, r0
|
||||
.irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
|
||||
mcr p10, 0, r1, c\dr, c0, 0 @ fmsr r0, s0
|
||||
mcr p10, 0, r0, c\dr, c0, 0 @ fmsr r0, s0
|
||||
mov pc, lr
|
||||
mcr p10, 0, r1, c\dr, c0, 4 @ fmsr r0, s1
|
||||
mcr p10, 0, r0, c\dr, c0, 4 @ fmsr r0, s1
|
||||
mov pc, lr
|
||||
.endr
|
||||
|
||||
@ -203,9 +203,9 @@ vfp_get_double:
|
||||
|
||||
.globl vfp_put_double
|
||||
vfp_put_double:
|
||||
add pc, pc, r0, lsl #3
|
||||
add pc, pc, r2, lsl #3
|
||||
mov r0, r0
|
||||
.irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
|
||||
fmdrr d\dr, r1, r2
|
||||
fmdrr d\dr, r0, r1
|
||||
mov pc, lr
|
||||
.endr
|
||||
|
||||
@ -200,7 +200,7 @@ u32 vfp_single_normaliseround(int sd, struct vfp_single *vs, u32 fpscr, u32 exce
|
||||
s32 d = vfp_single_pack(vs);
|
||||
pr_debug("VFP: %s: d(s%d)=%08x exceptions=%08x\n", func,
|
||||
sd, d, exceptions);
|
||||
vfp_put_float(sd, d);
|
||||
vfp_put_float(d, sd);
|
||||
}
|
||||
|
||||
return exceptions;
|
||||
@ -257,19 +257,19 @@ vfp_propagate_nan(struct vfp_single *vsd, struct vfp_single *vsn,
|
||||
*/
|
||||
static u32 vfp_single_fabs(int sd, int unused, s32 m, u32 fpscr)
|
||||
{
|
||||
vfp_put_float(sd, vfp_single_packed_abs(m));
|
||||
vfp_put_float(vfp_single_packed_abs(m), sd);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static u32 vfp_single_fcpy(int sd, int unused, s32 m, u32 fpscr)
|
||||
{
|
||||
vfp_put_float(sd, m);
|
||||
vfp_put_float(m, sd);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static u32 vfp_single_fneg(int sd, int unused, s32 m, u32 fpscr)
|
||||
{
|
||||
vfp_put_float(sd, vfp_single_packed_negate(m));
|
||||
vfp_put_float(vfp_single_packed_negate(m), sd);
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -333,7 +333,7 @@ static u32 vfp_single_fsqrt(int sd, int unused, s32 m, u32 fpscr)
|
||||
vsp = &vfp_single_default_qnan;
|
||||
ret = FPSCR_IOC;
|
||||
}
|
||||
vfp_put_float(sd, vfp_single_pack(vsp));
|
||||
vfp_put_float(vfp_single_pack(vsp), sd);
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -517,7 +517,7 @@ static u32 vfp_single_fcvtd(int dd, int unused, s32 m, u32 fpscr)
|
||||
return vfp_double_normaliseround(dd, &vdd, fpscr, exceptions, "fcvtd");
|
||||
|
||||
pack_nan:
|
||||
vfp_put_double(dd, vfp_double_pack(&vdd));
|
||||
vfp_put_double(vfp_double_pack(&vdd), dd);
|
||||
return exceptions;
|
||||
}
|
||||
|
||||
@ -613,7 +613,7 @@ static u32 vfp_single_ftoui(int sd, int unused, s32 m, u32 fpscr)
|
||||
|
||||
pr_debug("VFP: ftoui: d(s%d)=%08x exceptions=%08x\n", sd, d, exceptions);
|
||||
|
||||
vfp_put_float(sd, d);
|
||||
vfp_put_float(d, sd);
|
||||
|
||||
return exceptions;
|
||||
}
|
||||
@ -692,7 +692,7 @@ static u32 vfp_single_ftosi(int sd, int unused, s32 m, u32 fpscr)
|
||||
|
||||
pr_debug("VFP: ftosi: d(s%d)=%08x exceptions=%08x\n", sd, d, exceptions);
|
||||
|
||||
vfp_put_float(sd, (s32)d);
|
||||
vfp_put_float((s32)d, sd);
|
||||
|
||||
return exceptions;
|
||||
}
|
||||
@ -1127,7 +1127,7 @@ static u32 vfp_single_fdiv(int sd, int sn, s32 m, u32 fpscr)
|
||||
vsn_nan:
|
||||
exceptions = vfp_propagate_nan(&vsd, &vsn, &vsm, fpscr);
|
||||
pack:
|
||||
vfp_put_float(sd, vfp_single_pack(&vsd));
|
||||
vfp_put_float(vfp_single_pack(&vsd), sd);
|
||||
return exceptions;
|
||||
|
||||
vsm_nan:
|
||||
@ -1147,7 +1147,7 @@ static u32 vfp_single_fdiv(int sd, int sn, s32 m, u32 fpscr)
|
||||
goto pack;
|
||||
|
||||
invalid:
|
||||
vfp_put_float(sd, vfp_single_pack(&vfp_single_default_qnan));
|
||||
vfp_put_float(vfp_single_pack(&vfp_single_default_qnan), sd);
|
||||
return FPSCR_IOC;
|
||||
}
|
||||
|
||||
|
||||
@ -1,18 +1,13 @@
|
||||
/* linux/include/asm-arm/arch-bast/dma.h
|
||||
/* linux/include/asm-arm/arch-s3c2410/dma.h
|
||||
*
|
||||
* Copyright (C) 2003,2004 Simtec Electronics
|
||||
* Copyright (C) 2003,2004,2006 Simtec Electronics
|
||||
* Ben Dooks <ben@simtec.co.uk>
|
||||
*
|
||||
* Samsung S3C2410X DMA support
|
||||
* Samsung S3C241XX DMA support
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* Changelog:
|
||||
* ??-May-2003 BJD Created file
|
||||
* ??-Jun-2003 BJD Added more dma functionality to go with arch
|
||||
* 10-Nov-2004 BJD Added sys_device support
|
||||
*/
|
||||
|
||||
#ifndef __ASM_ARCH_DMA_H
|
||||
@ -21,28 +16,26 @@
|
||||
#include <linux/sysdev.h>
|
||||
#include "hardware.h"
|
||||
|
||||
|
||||
/*
|
||||
* This is the maximum DMA address(physical address) that can be DMAd to.
|
||||
*
|
||||
*/
|
||||
#define MAX_DMA_ADDRESS 0x20000000
|
||||
#define MAX_DMA_ADDRESS 0x40000000
|
||||
#define MAX_DMA_TRANSFER_SIZE 0x100000 /* Data Unit is half word */
|
||||
|
||||
|
||||
/* we have 4 dma channels */
|
||||
#define S3C2410_DMA_CHANNELS (4)
|
||||
|
||||
/* types */
|
||||
|
||||
typedef enum {
|
||||
enum s3c2410_dma_state {
|
||||
S3C2410_DMA_IDLE,
|
||||
S3C2410_DMA_RUNNING,
|
||||
S3C2410_DMA_PAUSED
|
||||
} s3c2410_dma_state_t;
|
||||
};
|
||||
|
||||
|
||||
/* s3c2410_dma_loadst_t
|
||||
/* enum s3c2410_dma_loadst
|
||||
*
|
||||
* This represents the state of the DMA engine, wrt to the loaded / running
|
||||
* transfers. Since we don't have any way of knowing exactly the state of
|
||||
@ -70,45 +63,40 @@ typedef enum {
|
||||
* currently running.
|
||||
*/
|
||||
|
||||
typedef enum {
|
||||
enum s3c2410_dma_loadst {
|
||||
S3C2410_DMALOAD_NONE,
|
||||
S3C2410_DMALOAD_1LOADED,
|
||||
S3C2410_DMALOAD_1RUNNING,
|
||||
S3C2410_DMALOAD_1LOADED_1RUNNING,
|
||||
} s3c2410_dma_loadst_t;
|
||||
};
|
||||
|
||||
typedef enum {
|
||||
enum s3c2410_dma_buffresult {
|
||||
S3C2410_RES_OK,
|
||||
S3C2410_RES_ERR,
|
||||
S3C2410_RES_ABORT
|
||||
} s3c2410_dma_buffresult_t;
|
||||
|
||||
|
||||
typedef enum s3c2410_dmasrc_e s3c2410_dmasrc_t;
|
||||
|
||||
enum s3c2410_dmasrc_e {
|
||||
S3C2410_DMASRC_HW, /* source is memory */
|
||||
S3C2410_DMASRC_MEM /* source is hardware */
|
||||
};
|
||||
|
||||
/* enum s3c2410_chan_op_e
|
||||
enum s3c2410_dmasrc {
|
||||
S3C2410_DMASRC_HW, /* source is memory */
|
||||
S3C2410_DMASRC_MEM /* source is hardware */
|
||||
};
|
||||
|
||||
/* enum s3c2410_chan_op
|
||||
*
|
||||
* operation codes passed to the DMA code by the user, and also used
|
||||
* to inform the current channel owner of any changes to the system state
|
||||
*/
|
||||
|
||||
enum s3c2410_chan_op_e {
|
||||
enum s3c2410_chan_op {
|
||||
S3C2410_DMAOP_START,
|
||||
S3C2410_DMAOP_STOP,
|
||||
S3C2410_DMAOP_PAUSE,
|
||||
S3C2410_DMAOP_RESUME,
|
||||
S3C2410_DMAOP_FLUSH,
|
||||
S3C2410_DMAOP_TIMEOUT, /* internal signal to handler */
|
||||
S3C2410_DMAOP_TIMEOUT, /* internal signal to handler */
|
||||
S3C2410_DMAOP_STARTED, /* indicate channel started */
|
||||
};
|
||||
|
||||
typedef enum s3c2410_chan_op_e s3c2410_chan_op_t;
|
||||
|
||||
/* flags */
|
||||
|
||||
#define S3C2410_DMAF_SLOW (1<<0) /* slow, so don't worry about
|
||||
@ -117,104 +105,100 @@ typedef enum s3c2410_chan_op_e s3c2410_chan_op_t;
|
||||
|
||||
/* dma buffer */
|
||||
|
||||
typedef struct s3c2410_dma_buf_s s3c2410_dma_buf_t;
|
||||
|
||||
struct s3c2410_dma_client {
|
||||
char *name;
|
||||
};
|
||||
|
||||
typedef struct s3c2410_dma_client s3c2410_dma_client_t;
|
||||
|
||||
/* s3c2410_dma_buf_s
|
||||
*
|
||||
* internally used buffer structure to describe a queued or running
|
||||
* buffer.
|
||||
*/
|
||||
|
||||
struct s3c2410_dma_buf_s {
|
||||
s3c2410_dma_buf_t *next;
|
||||
int magic; /* magic */
|
||||
int size; /* buffer size in bytes */
|
||||
dma_addr_t data; /* start of DMA data */
|
||||
dma_addr_t ptr; /* where the DMA got to [1] */
|
||||
void *id; /* client's id */
|
||||
struct s3c2410_dma_buf;
|
||||
struct s3c2410_dma_buf {
|
||||
struct s3c2410_dma_buf *next;
|
||||
int magic; /* magic */
|
||||
int size; /* buffer size in bytes */
|
||||
dma_addr_t data; /* start of DMA data */
|
||||
dma_addr_t ptr; /* where the DMA got to [1] */
|
||||
void *id; /* client's id */
|
||||
};
|
||||
|
||||
/* [1] is this updated for both recv/send modes? */
|
||||
|
||||
typedef struct s3c2410_dma_chan_s s3c2410_dma_chan_t;
|
||||
struct s3c2410_dma_chan;
|
||||
|
||||
/* s3c2410_dma_cbfn_t
|
||||
*
|
||||
* buffer callback routine type
|
||||
*/
|
||||
|
||||
typedef void (*s3c2410_dma_cbfn_t)(s3c2410_dma_chan_t *, void *buf, int size,
|
||||
s3c2410_dma_buffresult_t result);
|
||||
typedef void (*s3c2410_dma_cbfn_t)(struct s3c2410_dma_chan *,
|
||||
void *buf, int size,
|
||||
enum s3c2410_dma_buffresult result);
|
||||
|
||||
typedef int (*s3c2410_dma_opfn_t)(s3c2410_dma_chan_t *,
|
||||
s3c2410_chan_op_t );
|
||||
typedef int (*s3c2410_dma_opfn_t)(struct s3c2410_dma_chan *,
|
||||
enum s3c2410_chan_op );
|
||||
|
||||
struct s3c2410_dma_stats_s {
|
||||
unsigned long loads;
|
||||
unsigned long timeout_longest;
|
||||
unsigned long timeout_shortest;
|
||||
unsigned long timeout_avg;
|
||||
unsigned long timeout_failed;
|
||||
struct s3c2410_dma_stats {
|
||||
unsigned long loads;
|
||||
unsigned long timeout_longest;
|
||||
unsigned long timeout_shortest;
|
||||
unsigned long timeout_avg;
|
||||
unsigned long timeout_failed;
|
||||
};
|
||||
|
||||
typedef struct s3c2410_dma_stats_s s3c2410_dma_stats_t;
|
||||
|
||||
/* struct s3c2410_dma_chan_s
|
||||
/* struct s3c2410_dma_chan
|
||||
*
|
||||
* full state information for each DMA channel
|
||||
*/
|
||||
|
||||
struct s3c2410_dma_chan_s {
|
||||
struct s3c2410_dma_chan {
|
||||
/* channel state flags and information */
|
||||
unsigned char number; /* number of this dma channel */
|
||||
unsigned char in_use; /* channel allocated */
|
||||
unsigned char irq_claimed; /* irq claimed for channel */
|
||||
unsigned char irq_enabled; /* irq enabled for channel */
|
||||
unsigned char xfer_unit; /* size of an transfer */
|
||||
unsigned char number; /* number of this dma channel */
|
||||
unsigned char in_use; /* channel allocated */
|
||||
unsigned char irq_claimed; /* irq claimed for channel */
|
||||
unsigned char irq_enabled; /* irq enabled for channel */
|
||||
unsigned char xfer_unit; /* size of an transfer */
|
||||
|
||||
/* channel state */
|
||||
|
||||
s3c2410_dma_state_t state;
|
||||
s3c2410_dma_loadst_t load_state;
|
||||
s3c2410_dma_client_t *client;
|
||||
enum s3c2410_dma_state state;
|
||||
enum s3c2410_dma_loadst load_state;
|
||||
struct s3c2410_dma_client *client;
|
||||
|
||||
/* channel configuration */
|
||||
s3c2410_dmasrc_t source;
|
||||
unsigned long dev_addr;
|
||||
unsigned long load_timeout;
|
||||
unsigned int flags; /* channel flags */
|
||||
enum s3c2410_dmasrc source;
|
||||
unsigned long dev_addr;
|
||||
unsigned long load_timeout;
|
||||
unsigned int flags; /* channel flags */
|
||||
|
||||
/* channel's hardware position and configuration */
|
||||
void __iomem *regs; /* channels registers */
|
||||
void __iomem *addr_reg; /* data address register */
|
||||
unsigned int irq; /* channel irq */
|
||||
unsigned long dcon; /* default value of DCON */
|
||||
void __iomem *regs; /* channels registers */
|
||||
void __iomem *addr_reg; /* data address register */
|
||||
unsigned int irq; /* channel irq */
|
||||
unsigned long dcon; /* default value of DCON */
|
||||
|
||||
/* driver handles */
|
||||
s3c2410_dma_cbfn_t callback_fn; /* buffer done callback */
|
||||
s3c2410_dma_opfn_t op_fn; /* channel operation callback */
|
||||
s3c2410_dma_cbfn_t callback_fn; /* buffer done callback */
|
||||
s3c2410_dma_opfn_t op_fn; /* channel op callback */
|
||||
|
||||
/* stats gathering */
|
||||
s3c2410_dma_stats_t *stats;
|
||||
s3c2410_dma_stats_t stats_store;
|
||||
struct s3c2410_dma_stats *stats;
|
||||
struct s3c2410_dma_stats stats_store;
|
||||
|
||||
/* buffer list and information */
|
||||
s3c2410_dma_buf_t *curr; /* current dma buffer */
|
||||
s3c2410_dma_buf_t *next; /* next buffer to load */
|
||||
s3c2410_dma_buf_t *end; /* end of queue */
|
||||
struct s3c2410_dma_buf *curr; /* current dma buffer */
|
||||
struct s3c2410_dma_buf *next; /* next buffer to load */
|
||||
struct s3c2410_dma_buf *end; /* end of queue */
|
||||
|
||||
/* system device */
|
||||
struct sys_device dev;
|
||||
};
|
||||
|
||||
/* the currently allocated channel information */
|
||||
extern s3c2410_dma_chan_t s3c2410_chans[];
|
||||
extern struct s3c2410_dma_chan s3c2410_chans[];
|
||||
|
||||
/* note, we don't really use dma_device_t at the moment */
|
||||
typedef unsigned long dma_device_t;
|
||||
@ -227,7 +211,7 @@ typedef unsigned long dma_device_t;
|
||||
*/
|
||||
|
||||
extern int s3c2410_dma_request(dmach_t channel,
|
||||
s3c2410_dma_client_t *, void *dev);
|
||||
struct s3c2410_dma_client *, void *dev);
|
||||
|
||||
|
||||
/* s3c2410_dma_ctrl
|
||||
@ -235,7 +219,7 @@ extern int s3c2410_dma_request(dmach_t channel,
|
||||
* change the state of the dma channel
|
||||
*/
|
||||
|
||||
extern int s3c2410_dma_ctrl(dmach_t channel, s3c2410_chan_op_t op);
|
||||
extern int s3c2410_dma_ctrl(dmach_t channel, enum s3c2410_chan_op op);
|
||||
|
||||
/* s3c2410_dma_setflags
|
||||
*
|
||||
@ -250,7 +234,7 @@ extern int s3c2410_dma_setflags(dmach_t channel,
|
||||
* free the dma channel (will also abort any outstanding operations)
|
||||
*/
|
||||
|
||||
extern int s3c2410_dma_free(dmach_t channel, s3c2410_dma_client_t *);
|
||||
extern int s3c2410_dma_free(dmach_t channel, struct s3c2410_dma_client *);
|
||||
|
||||
/* s3c2410_dma_enqueue
|
||||
*
|
||||
@ -274,7 +258,7 @@ extern int s3c2410_dma_config(dmach_t channel, int xferunit, int dcon);
|
||||
* configure the device we're talking to
|
||||
*/
|
||||
|
||||
extern int s3c2410_dma_devconfig(int channel, s3c2410_dmasrc_t source,
|
||||
extern int s3c2410_dma_devconfig(int channel, enum s3c2410_dmasrc source,
|
||||
int hwcfg, unsigned long devaddr);
|
||||
|
||||
/* s3c2410_dma_getposition
|
||||
|
||||
@ -247,14 +247,12 @@ extern void dmac_flush_range(unsigned long, unsigned long);
|
||||
*/
|
||||
#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
|
||||
do { \
|
||||
flush_cache_page(vma, vaddr, page_to_pfn(page));\
|
||||
memcpy(dst, src, len); \
|
||||
flush_dcache_page(page); \
|
||||
flush_ptrace_access(vma, page, vaddr, dst, len, 1);\
|
||||
} while (0)
|
||||
|
||||
#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
|
||||
do { \
|
||||
flush_cache_page(vma, vaddr, page_to_pfn(page));\
|
||||
memcpy(dst, src, len); \
|
||||
} while (0)
|
||||
|
||||
@ -285,10 +283,24 @@ flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsigned l
|
||||
__cpuc_flush_user_range(addr, addr + PAGE_SIZE, vma->vm_flags);
|
||||
}
|
||||
}
|
||||
|
||||
static inline void
|
||||
flush_ptrace_access(struct vm_area_struct *vma, struct page *page,
|
||||
unsigned long uaddr, void *kaddr,
|
||||
unsigned long len, int write)
|
||||
{
|
||||
if (cpu_isset(smp_processor_id(), vma->vm_mm->cpu_vm_mask)) {
|
||||
unsigned long addr = (unsigned long)kaddr;
|
||||
__cpuc_coherent_kern_range(addr, addr + len);
|
||||
}
|
||||
}
|
||||
#else
|
||||
extern void flush_cache_mm(struct mm_struct *mm);
|
||||
extern void flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end);
|
||||
extern void flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsigned long pfn);
|
||||
extern void flush_ptrace_access(struct vm_area_struct *vma, struct page *page,
|
||||
unsigned long uaddr, void *kaddr,
|
||||
unsigned long len, int write);
|
||||
#endif
|
||||
|
||||
/*
|
||||
|
||||
@ -199,7 +199,21 @@ static inline void __raw_read_unlock(raw_rwlock_t *rw)
|
||||
: "cc");
|
||||
}
|
||||
|
||||
#define __raw_read_trylock(lock) generic__raw_read_trylock(lock)
|
||||
static inline int __raw_read_trylock(raw_rwlock_t *rw)
|
||||
{
|
||||
unsigned long tmp tmp2 = 1;
|
||||
|
||||
__asm__ __volatile__(
|
||||
"1: ldrex %0, [%2]\n"
|
||||
" adds %0, %0, #1\n"
|
||||
" strexpl %1, %0, [%2]\n"
|
||||
: "=&r" (tmp), "+r" (tmp2)
|
||||
: "r" (&rw->lock)
|
||||
: "cc");
|
||||
|
||||
smp_mb();
|
||||
return tmp2 == 0;
|
||||
}
|
||||
|
||||
/* read_can_lock - would read_trylock() succeed? */
|
||||
#define __raw_read_can_lock(x) ((x)->lock < 0x80000000)
|
||||
|
||||
Loading…
Reference in New Issue
Block a user