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ARM: Samsung SoC fixes for 3.5-rc

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Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM Samsung SoC fixes from Arnd Bergmann.

* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  ARM: S3C24XX: Correct CAMIF interrupt definitions
  ARM: S3C24XX: Correct AC97 clock control bit for S3C2440
  ARM: SAMSUNG: fix race in s3c_adc_start for ADC
  ARM: SAMSUNG: Update default rate for xusbxti clock
  ARM: EXYNOS: register devices in 'need_restore' state for pm_domains
  ARM: EXYNOS: read initial state of power domain from hw registers
This commit is contained in:
Linus Torvalds 2012-07-14 11:50:36 -07:00
commit e60d7458cb
5 changed files with 18 additions and 9 deletions
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13
arch/arm/mach-exynos/pm_domains.c
View File

@ -119,7 +119,9 @@ static __init void exynos_pm_add_dev_to_genpd(struct platform_device *pdev,
struct exynos_pm_domain *pd)
{
if (pdev->dev.bus) {
if (pm_genpd_add_device(&pd->pd, &pdev->dev))
if (!pm_genpd_add_device(&pd->pd, &pdev->dev))
pm_genpd_dev_need_restore(&pdev->dev, true);
else
pr_info("%s: error in adding %s device to %s power"
"domain\n", __func__, dev_name(&pdev->dev),
pd->name);
@ -151,9 +153,12 @@ static __init int exynos4_pm_init_power_domain(void)
if (of_have_populated_dt())
return exynos_pm_dt_parse_domains();
for (idx = 0; idx < ARRAY_SIZE(exynos4_pm_domains); idx++)
pm_genpd_init(&exynos4_pm_domains[idx]->pd, NULL,
exynos4_pm_domains[idx]->is_off);
for (idx = 0; idx < ARRAY_SIZE(exynos4_pm_domains); idx++) {
struct exynos_pm_domain *pd = exynos4_pm_domains[idx];
int on = __raw_readl(pd->base + 0x4) & S5P_INT_LOCAL_PWR_EN;
pm_genpd_init(&pd->pd, NULL, !on);
}
#ifdef CONFIG_S5P_DEV_FIMD0
exynos_pm_add_dev_to_genpd(&s5p_device_fimd0, &exynos4_pd_lcd0);

2
arch/arm/mach-s3c24xx/clock-s3c2440.c
View File

@ -106,7 +106,7 @@ static struct clk s3c2440_clk_cam_upll = {
static struct clk s3c2440_clk_ac97 = {
.name = "ac97",
.enable = s3c2410_clkcon_enable,
.ctrlbit = S3C2440_CLKCON_CAMERA,
.ctrlbit = S3C2440_CLKCON_AC97,
};
static unsigned long s3c2440_fclk_n_getrate(struct clk *clk)

8
arch/arm/plat-samsung/adc.c
View File

@ -157,11 +157,13 @@ int s3c_adc_start(struct s3c_adc_client *client,
return -EINVAL;
}
if (client->is_ts && adc->ts_pend)
return -EAGAIN;
spin_lock_irqsave(&adc->lock, flags);
if (client->is_ts && adc->ts_pend) {
spin_unlock_irqrestore(&adc->lock, flags);
return -EAGAIN;
}
client->channel = channel;
client->nr_samples = nr_samples;

3
arch/arm/plat-samsung/devs.c
View File

@ -126,7 +126,8 @@ struct platform_device s3c_device_adc = {
#ifdef CONFIG_CPU_S3C2440
static struct resource s3c_camif_resource[] = {
[0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF),
[1] = DEFINE_RES_IRQ(IRQ_CAM),
[1] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_C),
[2] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_P),
};
struct platform_device s3c_device_camif = {

1
arch/arm/plat-samsung/s5p-clock.c
View File

@ -37,6 +37,7 @@ struct clk clk_ext_xtal_mux = {
struct clk clk_xusbxti = {
.name = "xusbxti",
.id = -1,
.rate = 24000000,
};
struct clk s5p_clk_27m = {