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KVM: PPC: BOOK3S: PR: Enable Little Endian PR guest
This patch make sure we inherit the LE bit correctly in different case so that we can run Little Endian distro in PR mode Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by: Alexander Graf <agraf@suse.de>
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@ -562,6 +562,7 @@ struct kvm_vcpu_arch {
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#ifdef CONFIG_PPC_BOOK3S
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ulong fault_dar;
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u32 fault_dsisr;
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unsigned long intr_msr;
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#endif
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#ifdef CONFIG_BOOKE
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@ -654,7 +655,6 @@ struct kvm_vcpu_arch {
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spinlock_t tbacct_lock;
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u64 busy_stolen;
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u64 busy_preempt;
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unsigned long intr_msr;
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#endif
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};
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@ -493,7 +493,6 @@ int main(void)
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DEFINE(VCPU_DAR, offsetof(struct kvm_vcpu, arch.shregs.dar));
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DEFINE(VCPU_VPA, offsetof(struct kvm_vcpu, arch.vpa.pinned_addr));
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DEFINE(VCPU_VPA_DIRTY, offsetof(struct kvm_vcpu, arch.vpa.dirty));
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DEFINE(VCPU_INTR_MSR, offsetof(struct kvm_vcpu, arch.intr_msr));
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#endif
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#ifdef CONFIG_PPC_BOOK3S
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DEFINE(VCPU_VCPUID, offsetof(struct kvm_vcpu, vcpu_id));
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@ -528,6 +527,7 @@ int main(void)
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DEFINE(VCPU_SLB_NR, offsetof(struct kvm_vcpu, arch.slb_nr));
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DEFINE(VCPU_FAULT_DSISR, offsetof(struct kvm_vcpu, arch.fault_dsisr));
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DEFINE(VCPU_FAULT_DAR, offsetof(struct kvm_vcpu, arch.fault_dar));
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DEFINE(VCPU_INTR_MSR, offsetof(struct kvm_vcpu, arch.intr_msr));
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DEFINE(VCPU_LAST_INST, offsetof(struct kvm_vcpu, arch.last_inst));
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DEFINE(VCPU_TRAP, offsetof(struct kvm_vcpu, arch.trap));
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DEFINE(VCPU_CFAR, offsetof(struct kvm_vcpu, arch.cfar));
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@ -38,7 +38,7 @@
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static void kvmppc_mmu_book3s_64_reset_msr(struct kvm_vcpu *vcpu)
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{
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kvmppc_set_msr(vcpu, MSR_SF);
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kvmppc_set_msr(vcpu, vcpu->arch.intr_msr);
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}
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static struct kvmppc_slb *kvmppc_mmu_book3s_64_find_slbe(
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@ -249,7 +249,7 @@ static void kvmppc_recalc_shadow_msr(struct kvm_vcpu *vcpu)
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ulong smsr = vcpu->arch.shared->msr;
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/* Guest MSR values */
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smsr &= MSR_FE0 | MSR_FE1 | MSR_SF | MSR_SE | MSR_BE;
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smsr &= MSR_FE0 | MSR_FE1 | MSR_SF | MSR_SE | MSR_BE | MSR_LE;
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/* Process MSR values */
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smsr |= MSR_ME | MSR_RI | MSR_IR | MSR_DR | MSR_PR | MSR_EE;
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/* External providers the guest reserved */
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@ -1110,6 +1110,15 @@ static int kvmppc_get_one_reg_pr(struct kvm_vcpu *vcpu, u64 id,
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case KVM_REG_PPC_HIOR:
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*val = get_reg_val(id, to_book3s(vcpu)->hior);
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break;
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case KVM_REG_PPC_LPCR:
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/*
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* We are only interested in the LPCR_ILE bit
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*/
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if (vcpu->arch.intr_msr & MSR_LE)
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*val = get_reg_val(id, LPCR_ILE);
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else
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*val = get_reg_val(id, 0);
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break;
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default:
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r = -EINVAL;
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break;
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@ -1118,6 +1127,14 @@ static int kvmppc_get_one_reg_pr(struct kvm_vcpu *vcpu, u64 id,
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return r;
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}
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static void kvmppc_set_lpcr_pr(struct kvm_vcpu *vcpu, u64 new_lpcr)
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{
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if (new_lpcr & LPCR_ILE)
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vcpu->arch.intr_msr |= MSR_LE;
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else
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vcpu->arch.intr_msr &= ~MSR_LE;
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}
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static int kvmppc_set_one_reg_pr(struct kvm_vcpu *vcpu, u64 id,
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union kvmppc_one_reg *val)
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{
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@ -1128,6 +1145,9 @@ static int kvmppc_set_one_reg_pr(struct kvm_vcpu *vcpu, u64 id,
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to_book3s(vcpu)->hior = set_reg_val(id, *val);
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to_book3s(vcpu)->hior_explicit = true;
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break;
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case KVM_REG_PPC_LPCR:
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kvmppc_set_lpcr_pr(vcpu, set_reg_val(id, *val));
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break;
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default:
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r = -EINVAL;
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break;
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@ -1180,6 +1200,7 @@ static struct kvm_vcpu *kvmppc_core_vcpu_create_pr(struct kvm *kvm,
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vcpu->arch.pvr = 0x3C0301;
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if (mmu_has_feature(MMU_FTR_1T_SEGMENT))
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vcpu->arch.pvr = mfspr(SPRN_PVR);
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vcpu->arch.intr_msr = MSR_SF;
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#else
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/* default to book3s_32 (750) */
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vcpu->arch.pvr = 0x84202;
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