mirror of
https://github.com/torvalds/linux.git
synced 2024-11-23 12:42:02 +00:00
Merge branch 'for-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into asoc-5.11
This commit is contained in:
commit
e5879d9882
@ -8,10 +8,16 @@ Required properties:
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- reg : The I2C address of the device.
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Optional properties:
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- realtek,power-up-delay-ms
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Set a delay time for flush work to be completed,
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this value is adjustable depending on platform.
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Example:
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rt1015: codec@28 {
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compatible = "realtek,rt1015";
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reg = <0x28>;
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realtek,power-up-delay-ms = <50>;
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};
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15
include/sound/rt1015.h
Normal file
15
include/sound/rt1015.h
Normal file
@ -0,0 +1,15 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* linux/sound/rt1015.h -- Platform data for RT1015
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*
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* Copyright 2020 Realtek Microelectronics
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*/
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#ifndef __LINUX_SND_RT1015_H
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#define __LINUX_SND_RT1015_H
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struct rt1015_platform_data {
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unsigned int power_up_delay_ms;
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};
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#endif
|
@ -232,6 +232,7 @@ static int snd_acp3x_probe(struct pci_dev *pci,
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break;
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default:
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dev_info(&pci->dev, "ACP audio mode : %d\n", val);
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break;
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}
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pm_runtime_set_autosuspend_delay(&pci->dev, 2000);
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pm_runtime_use_autosuspend(&pci->dev);
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@ -224,7 +224,7 @@ static int snd_rn_acp_probe(struct pci_dev *pci,
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handle = ACPI_HANDLE(&pci->dev);
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ret = acpi_evaluate_integer(handle, "_WOV", NULL, &dmic_status);
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if (ACPI_FAILURE(ret)) {
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ret = -EINVAL;
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ret = -ENODEV;
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goto de_init;
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}
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if (!dmic_status) {
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|
@ -487,7 +487,6 @@ static int mchp_spdiftx_hw_params(struct snd_pcm_substream *substream,
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}
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mchp_spdiftx_channel_status_write(dev);
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spin_unlock_irqrestore(&ctrl->lock, flags);
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mr |= SPDIFTX_MR_VALID1 | SPDIFTX_MR_VALID2;
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if (dev->gclk_enabled) {
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clk_disable_unprepare(dev->gclk);
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|
@ -27,10 +27,15 @@
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#include <sound/soc-dapm.h>
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#include <sound/soc.h>
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#include <sound/tlv.h>
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#include <sound/rt1015.h>
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#include "rl6231.h"
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#include "rt1015.h"
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static const struct rt1015_platform_data i2s_default_platform_data = {
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.power_up_delay_ms = 50,
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};
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static const struct reg_default rt1015_reg[] = {
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{ 0x0000, 0x0000 },
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{ 0x0004, 0xa000 },
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@ -561,7 +566,7 @@ static void rt1015_flush_work(struct work_struct *work)
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struct rt1015_priv *rt1015 = container_of(work, struct rt1015_priv,
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flush_work.work);
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struct snd_soc_component *component = rt1015->component;
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unsigned int val, i = 0, count = 20;
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unsigned int val, i = 0, count = 200;
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while (i < count) {
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usleep_range(1000, 1500);
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@ -684,6 +689,7 @@ static int rt1015_amp_drv_event(struct snd_soc_dapm_widget *w,
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case SND_SOC_DAPM_POST_PMU:
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if (rt1015->hw_config == RT1015_HW_28)
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schedule_delayed_work(&rt1015->flush_work, msecs_to_jiffies(10));
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msleep(rt1015->pdata.power_up_delay_ms);
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break;
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default:
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break;
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@ -1163,9 +1169,16 @@ static struct acpi_device_id rt1015_acpi_match[] = {
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MODULE_DEVICE_TABLE(acpi, rt1015_acpi_match);
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#endif
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static void rt1015_parse_dt(struct rt1015_priv *rt1015, struct device *dev)
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{
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device_property_read_u32(dev, "realtek,power-up-delay-ms",
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&rt1015->pdata.power_up_delay_ms);
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}
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static int rt1015_i2c_probe(struct i2c_client *i2c,
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const struct i2c_device_id *id)
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{
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struct rt1015_platform_data *pdata = dev_get_platdata(&i2c->dev);
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struct rt1015_priv *rt1015;
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int ret;
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unsigned int val;
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@ -1177,6 +1190,13 @@ static int rt1015_i2c_probe(struct i2c_client *i2c,
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i2c_set_clientdata(i2c, rt1015);
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|
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rt1015->pdata = i2s_default_platform_data;
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if (pdata)
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rt1015->pdata = *pdata;
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else
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rt1015_parse_dt(rt1015, &i2c->dev);
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rt1015->regmap = devm_regmap_init_i2c(i2c, &rt1015_regmap);
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if (IS_ERR(rt1015->regmap)) {
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ret = PTR_ERR(rt1015->regmap);
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|
@ -12,6 +12,7 @@
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#ifndef __RT1015_H__
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#define __RT1015_H__
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#include <sound/rt1015.h>
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#define RT1015_DEVICE_ID_VAL 0x1011
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#define RT1015_DEVICE_ID_VAL2 0x1015
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@ -422,6 +423,7 @@ enum {
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struct rt1015_priv {
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struct snd_soc_component *component;
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struct rt1015_platform_data pdata;
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struct regmap *regmap;
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int sysclk;
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int sysclk_src;
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@ -43,6 +43,7 @@ static const struct reg_sequence patch_list[] = {
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{RT5682_DAC_ADC_DIG_VOL1, 0xa020},
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{RT5682_I2C_CTRL, 0x000f},
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{RT5682_PLL2_INTERNAL, 0x8266},
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{RT5682_SAR_IL_CMD_3, 0x8365},
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};
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|
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void rt5682_apply_patch_list(struct rt5682_priv *rt5682, struct device *dev)
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|
@ -618,7 +618,7 @@ static const char * const sb_tx8_mux_text[] = {
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"ZERO", "RX_MIX_TX8", "DEC8", "DEC8_192"
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};
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static const DECLARE_TLV_DB_SCALE(digital_gain, 0, 1, 0);
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static const DECLARE_TLV_DB_SCALE(digital_gain, -8400, 100, -8400);
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static const DECLARE_TLV_DB_SCALE(line_gain, 0, 7, 1);
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static const DECLARE_TLV_DB_SCALE(analog_gain, 0, 25, 1);
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static const DECLARE_TLV_DB_SCALE(ear_pa_gain, 0, 150, 0);
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@ -551,7 +551,7 @@ struct wcd_iir_filter_ctl {
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struct soc_bytes_ext bytes_ext;
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};
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static const DECLARE_TLV_DB_SCALE(digital_gain, 0, 1, 0);
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static const DECLARE_TLV_DB_SCALE(digital_gain, -8400, 100, -8400);
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static const DECLARE_TLV_DB_SCALE(line_gain, 0, 7, 1);
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static const DECLARE_TLV_DB_SCALE(analog_gain, 0, 25, 1);
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static const DECLARE_TLV_DB_SCALE(ear_pa_gain, 0, 150, 0);
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@ -1937,6 +1937,7 @@ static int wm_adsp_load(struct wm_adsp *dsp)
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mem = wm_adsp_find_region(dsp, type);
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if (!mem) {
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adsp_err(dsp, "No region of type: %x\n", type);
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ret = -EINVAL;
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goto out_fw;
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}
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@ -520,10 +520,10 @@ static const struct dmi_system_id byt_rt5640_quirk_table[] = {
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.driver_data = (void *)(BYT_RT5640_IN1_MAP |
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BYT_RT5640_MCLK_EN),
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},
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{ /* HP Pavilion x2 10-n000nd */
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{ /* HP Pavilion x2 10-k0XX, 10-n0XX */
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.matches = {
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DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
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DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "HP Pavilion x2 Detachable"),
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DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
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DMI_MATCH(DMI_PRODUCT_NAME, "HP Pavilion x2 Detachable"),
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},
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.driver_data = (void *)(BYT_RT5640_DMIC1_MAP |
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BYT_RT5640_JD_SRC_JD2_IN4N |
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@ -532,6 +532,17 @@ static const struct dmi_system_id byt_rt5640_quirk_table[] = {
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BYT_RT5640_SSP0_AIF1 |
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BYT_RT5640_MCLK_EN),
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},
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{ /* HP Pavilion x2 10-p0XX */
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "HP"),
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DMI_MATCH(DMI_PRODUCT_NAME, "HP x2 Detachable 10-p0XX"),
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},
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.driver_data = (void *)(BYT_RT5640_DMIC1_MAP |
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BYT_RT5640_JD_SRC_JD1_IN4P |
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BYT_RT5640_OVCD_TH_1500UA |
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BYT_RT5640_OVCD_SF_0P75 |
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BYT_RT5640_MCLK_EN),
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},
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{ /* HP Stream 7 */
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.matches = {
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DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
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|
@ -700,6 +700,8 @@ static int kabylake_set_bias_level(struct snd_soc_card *card,
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switch (level) {
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case SND_SOC_BIAS_PREPARE:
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if (dapm->bias_level == SND_SOC_BIAS_ON) {
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if (!__clk_is_enabled(priv->mclk))
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return 0;
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dev_dbg(card->dev, "Disable mclk");
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clk_disable_unprepare(priv->mclk);
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} else {
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|
@ -487,9 +487,9 @@ static int kmb_dai_hw_params(struct snd_pcm_substream *substream,
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kmb_i2s->xfer_resolution = 0x02;
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break;
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case SNDRV_PCM_FORMAT_S24_LE:
|
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config->data_width = 24;
|
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kmb_i2s->ccr = 0x08;
|
||||
kmb_i2s->xfer_resolution = 0x04;
|
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config->data_width = 32;
|
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kmb_i2s->ccr = 0x14;
|
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kmb_i2s->xfer_resolution = 0x05;
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break;
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case SNDRV_PCM_FORMAT_S32_LE:
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config->data_width = 32;
|
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|
@ -808,7 +808,7 @@ static ssize_t mtk_btcvsd_snd_write(struct mtk_btcvsd_snd *bt,
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spin_unlock_irqrestore(&bt->tx_lock, flags);
|
||||
|
||||
if (!avail) {
|
||||
int ret = wait_for_bt_irq(bt, bt->rx);
|
||||
int ret = wait_for_bt_irq(bt, bt->tx);
|
||||
|
||||
if (ret)
|
||||
return written_size;
|
||||
|
@ -80,6 +80,12 @@ static int lpass_cpu_daiops_startup(struct snd_pcm_substream *substream,
|
||||
dev_err(dai->dev, "error in enabling mi2s osr clk: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
ret = clk_prepare(drvdata->mi2s_bit_clk[dai->driver->id]);
|
||||
if (ret) {
|
||||
dev_err(dai->dev, "error in enabling mi2s bit clk: %d\n", ret);
|
||||
clk_disable_unprepare(drvdata->mi2s_osr_clk[dai->driver->id]);
|
||||
return ret;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -88,9 +94,8 @@ static void lpass_cpu_daiops_shutdown(struct snd_pcm_substream *substream,
|
||||
{
|
||||
struct lpass_data *drvdata = snd_soc_dai_get_drvdata(dai);
|
||||
|
||||
clk_disable_unprepare(drvdata->mi2s_bit_clk[dai->driver->id]);
|
||||
|
||||
clk_disable_unprepare(drvdata->mi2s_osr_clk[dai->driver->id]);
|
||||
clk_unprepare(drvdata->mi2s_bit_clk[dai->driver->id]);
|
||||
}
|
||||
|
||||
static int lpass_cpu_daiops_hw_params(struct snd_pcm_substream *substream,
|
||||
@ -258,28 +263,6 @@ static int lpass_cpu_daiops_hw_params(struct snd_pcm_substream *substream,
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int lpass_cpu_daiops_prepare(struct snd_pcm_substream *substream,
|
||||
struct snd_soc_dai *dai)
|
||||
{
|
||||
struct lpass_data *drvdata = snd_soc_dai_get_drvdata(dai);
|
||||
struct lpaif_i2sctl *i2sctl = drvdata->i2sctl;
|
||||
unsigned int id = dai->driver->id;
|
||||
int ret;
|
||||
|
||||
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
|
||||
ret = regmap_fields_write(i2sctl->spken, id,
|
||||
LPAIF_I2SCTL_SPKEN_ENABLE);
|
||||
} else {
|
||||
ret = regmap_fields_write(i2sctl->micen, id,
|
||||
LPAIF_I2SCTL_MICEN_ENABLE);
|
||||
}
|
||||
|
||||
if (ret)
|
||||
dev_err(dai->dev, "error writing to i2sctl enable: %d\n", ret);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int lpass_cpu_daiops_trigger(struct snd_pcm_substream *substream,
|
||||
int cmd, struct snd_soc_dai *dai)
|
||||
{
|
||||
@ -287,6 +270,18 @@ static int lpass_cpu_daiops_trigger(struct snd_pcm_substream *substream,
|
||||
struct lpaif_i2sctl *i2sctl = drvdata->i2sctl;
|
||||
unsigned int id = dai->driver->id;
|
||||
int ret = -EINVAL;
|
||||
unsigned int val = 0;
|
||||
|
||||
ret = regmap_read(drvdata->lpaif_map,
|
||||
LPAIF_I2SCTL_REG(drvdata->variant, dai->driver->id), &val);
|
||||
if (ret) {
|
||||
dev_err(dai->dev, "error reading from i2sctl reg: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
if (val == LPAIF_I2SCTL_RESET_STATE) {
|
||||
dev_err(dai->dev, "error in i2sctl register state\n");
|
||||
return -ENOTRECOVERABLE;
|
||||
}
|
||||
|
||||
switch (cmd) {
|
||||
case SNDRV_PCM_TRIGGER_START:
|
||||
@ -303,11 +298,14 @@ static int lpass_cpu_daiops_trigger(struct snd_pcm_substream *substream,
|
||||
dev_err(dai->dev, "error writing to i2sctl reg: %d\n",
|
||||
ret);
|
||||
|
||||
ret = clk_prepare_enable(drvdata->mi2s_bit_clk[id]);
|
||||
if (ret) {
|
||||
dev_err(dai->dev, "error in enabling mi2s bit clk: %d\n", ret);
|
||||
clk_disable_unprepare(drvdata->mi2s_osr_clk[id]);
|
||||
return ret;
|
||||
if (drvdata->bit_clk_state[id] == LPAIF_BIT_CLK_DISABLE) {
|
||||
ret = clk_enable(drvdata->mi2s_bit_clk[id]);
|
||||
if (ret) {
|
||||
dev_err(dai->dev, "error in enabling mi2s bit clk: %d\n", ret);
|
||||
clk_disable(drvdata->mi2s_osr_clk[id]);
|
||||
return ret;
|
||||
}
|
||||
drvdata->bit_clk_state[id] = LPAIF_BIT_CLK_ENABLE;
|
||||
}
|
||||
|
||||
break;
|
||||
@ -324,6 +322,10 @@ static int lpass_cpu_daiops_trigger(struct snd_pcm_substream *substream,
|
||||
if (ret)
|
||||
dev_err(dai->dev, "error writing to i2sctl reg: %d\n",
|
||||
ret);
|
||||
if (drvdata->bit_clk_state[id] == LPAIF_BIT_CLK_ENABLE) {
|
||||
clk_disable(drvdata->mi2s_bit_clk[dai->driver->id]);
|
||||
drvdata->bit_clk_state[id] = LPAIF_BIT_CLK_DISABLE;
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
@ -335,7 +337,6 @@ const struct snd_soc_dai_ops asoc_qcom_lpass_cpu_dai_ops = {
|
||||
.startup = lpass_cpu_daiops_startup,
|
||||
.shutdown = lpass_cpu_daiops_shutdown,
|
||||
.hw_params = lpass_cpu_daiops_hw_params,
|
||||
.prepare = lpass_cpu_daiops_prepare,
|
||||
.trigger = lpass_cpu_daiops_trigger,
|
||||
};
|
||||
EXPORT_SYMBOL_GPL(asoc_qcom_lpass_cpu_dai_ops);
|
||||
@ -453,16 +454,20 @@ static bool lpass_cpu_regmap_volatile(struct device *dev, unsigned int reg)
|
||||
struct lpass_variant *v = drvdata->variant;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < v->i2s_ports; ++i)
|
||||
if (reg == LPAIF_I2SCTL_REG(v, i))
|
||||
return true;
|
||||
for (i = 0; i < v->irq_ports; ++i)
|
||||
if (reg == LPAIF_IRQSTAT_REG(v, i))
|
||||
return true;
|
||||
|
||||
for (i = 0; i < v->rdma_channels; ++i)
|
||||
if (reg == LPAIF_RDMACURR_REG(v, i))
|
||||
if (reg == LPAIF_RDMACURR_REG(v, i) || reg == LPAIF_RDMACTL_REG(v, i))
|
||||
return true;
|
||||
|
||||
for (i = 0; i < v->wrdma_channels; ++i)
|
||||
if (reg == LPAIF_WRDMACURR_REG(v, i + v->wrdma_channel_start))
|
||||
if (reg == LPAIF_WRDMACURR_REG(v, i + v->wrdma_channel_start) ||
|
||||
reg == LPAIF_WRDMACTL_REG(v, i + v->wrdma_channel_start))
|
||||
return true;
|
||||
|
||||
return false;
|
||||
@ -855,6 +860,7 @@ int asoc_qcom_lpass_cpu_platform_probe(struct platform_device *pdev)
|
||||
PTR_ERR(drvdata->mi2s_bit_clk[dai_id]));
|
||||
return PTR_ERR(drvdata->mi2s_bit_clk[dai_id]);
|
||||
}
|
||||
drvdata->bit_clk_state[dai_id] = LPAIF_BIT_CLK_DISABLE;
|
||||
}
|
||||
|
||||
/* Allocation for i2sctl regmap fields */
|
||||
|
@ -60,6 +60,13 @@
|
||||
#define LPAIF_I2SCTL_BITWIDTH_24 1
|
||||
#define LPAIF_I2SCTL_BITWIDTH_32 2
|
||||
|
||||
#define LPAIF_BIT_CLK_DISABLE 0
|
||||
#define LPAIF_BIT_CLK_ENABLE 1
|
||||
|
||||
#define LPAIF_I2SCTL_RESET_STATE 0x003C0004
|
||||
#define LPAIF_DMACTL_RESET_STATE 0x00200000
|
||||
|
||||
|
||||
/* LPAIF IRQ */
|
||||
#define LPAIF_IRQ_REG_ADDR(v, addr, port) \
|
||||
(v->irq_reg_base + (addr) + v->irq_reg_stride * (port))
|
||||
|
@ -110,6 +110,7 @@ static int lpass_platform_pcmops_open(struct snd_soc_component *component,
|
||||
struct regmap *map;
|
||||
unsigned int dai_id = cpu_dai->driver->id;
|
||||
|
||||
component->id = dai_id;
|
||||
data = kzalloc(sizeof(*data), GFP_KERNEL);
|
||||
if (!data)
|
||||
return -ENOMEM;
|
||||
@ -122,8 +123,10 @@ static int lpass_platform_pcmops_open(struct snd_soc_component *component,
|
||||
else
|
||||
dma_ch = 0;
|
||||
|
||||
if (dma_ch < 0)
|
||||
if (dma_ch < 0) {
|
||||
kfree(data);
|
||||
return dma_ch;
|
||||
}
|
||||
|
||||
if (cpu_dai->driver->id == LPASS_DP_RX) {
|
||||
map = drvdata->hdmiif_map;
|
||||
@ -147,6 +150,7 @@ static int lpass_platform_pcmops_open(struct snd_soc_component *component,
|
||||
ret = snd_pcm_hw_constraint_integer(runtime,
|
||||
SNDRV_PCM_HW_PARAM_PERIODS);
|
||||
if (ret < 0) {
|
||||
kfree(data);
|
||||
dev_err(soc_runtime->dev, "setting constraints failed: %d\n",
|
||||
ret);
|
||||
return -EINVAL;
|
||||
@ -448,19 +452,34 @@ static int lpass_platform_pcmops_trigger(struct snd_soc_component *component,
|
||||
unsigned int reg_irqclr = 0, val_irqclr = 0;
|
||||
unsigned int reg_irqen = 0, val_irqen = 0, val_mask = 0;
|
||||
unsigned int dai_id = cpu_dai->driver->id;
|
||||
unsigned int dma_ctrl_reg = 0;
|
||||
|
||||
ch = pcm_data->dma_ch;
|
||||
if (dir == SNDRV_PCM_STREAM_PLAYBACK) {
|
||||
id = pcm_data->dma_ch;
|
||||
if (dai_id == LPASS_DP_RX)
|
||||
if (dai_id == LPASS_DP_RX) {
|
||||
dmactl = drvdata->hdmi_rd_dmactl;
|
||||
else
|
||||
map = drvdata->hdmiif_map;
|
||||
} else {
|
||||
dmactl = drvdata->rd_dmactl;
|
||||
map = drvdata->lpaif_map;
|
||||
}
|
||||
} else {
|
||||
dmactl = drvdata->wr_dmactl;
|
||||
id = pcm_data->dma_ch - v->wrdma_channel_start;
|
||||
map = drvdata->lpaif_map;
|
||||
}
|
||||
ret = regmap_read(map, LPAIF_DMACTL_REG(v, ch, dir, dai_id), &dma_ctrl_reg);
|
||||
if (ret) {
|
||||
dev_err(soc_runtime->dev, "error reading from rdmactl reg: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
if (dma_ctrl_reg == LPAIF_DMACTL_RESET_STATE ||
|
||||
dma_ctrl_reg == LPAIF_DMACTL_RESET_STATE + 1) {
|
||||
dev_err(soc_runtime->dev, "error in rdmactl register state\n");
|
||||
return -ENOTRECOVERABLE;
|
||||
}
|
||||
switch (cmd) {
|
||||
case SNDRV_PCM_TRIGGER_START:
|
||||
case SNDRV_PCM_TRIGGER_RESUME:
|
||||
|
@ -189,7 +189,7 @@ static struct lpass_variant sc7180_data = {
|
||||
.micmode = REG_FIELD_ID(0x1000, 4, 8, 3, 0x1000),
|
||||
.micmono = REG_FIELD_ID(0x1000, 3, 3, 3, 0x1000),
|
||||
.wssrc = REG_FIELD_ID(0x1000, 2, 2, 3, 0x1000),
|
||||
.bitwidth = REG_FIELD_ID(0x1000, 0, 0, 3, 0x1000),
|
||||
.bitwidth = REG_FIELD_ID(0x1000, 0, 1, 3, 0x1000),
|
||||
|
||||
.rdma_dyncclk = REG_FIELD_ID(0xC000, 21, 21, 5, 0x1000),
|
||||
.rdma_bursten = REG_FIELD_ID(0xC000, 20, 20, 5, 0x1000),
|
||||
|
@ -68,6 +68,7 @@ struct lpass_data {
|
||||
unsigned int mi2s_playback_sd_mode[LPASS_MAX_MI2S_PORTS];
|
||||
unsigned int mi2s_capture_sd_mode[LPASS_MAX_MI2S_PORTS];
|
||||
int hdmi_port_enable;
|
||||
int bit_clk_state[LPASS_MAX_MI2S_PORTS];
|
||||
|
||||
/* low-power audio interface (LPAIF) registers */
|
||||
void __iomem *lpaif;
|
||||
|
Loading…
Reference in New Issue
Block a user