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https://github.com/torvalds/linux.git
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Merge branches 'amso1100', 'cma', 'cxgb4', 'misc', 'mlx4' and 'qib' into for-next
This commit is contained in:
Roland Dreier
commit
e51c7b1ab0
@ -1079,7 +1079,7 @@ static void ib_sa_remove_one(struct ib_device *device)
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ib_unregister_event_handler(&sa_dev->event_handler);
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flush_scheduled_work();
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flush_workqueue(ib_wq);
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for (i = 0; i <= sa_dev->end_port - sa_dev->start_port; ++i) {
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if (rdma_port_get_link_layer(device, i + 1) == IB_LINK_LAYER_INFINIBAND) {
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@ -636,6 +636,16 @@ static void ucma_copy_iboe_route(struct rdma_ucm_query_route_resp *resp,
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}
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}
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static void ucma_copy_iw_route(struct rdma_ucm_query_route_resp *resp,
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struct rdma_route *route)
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{
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struct rdma_dev_addr *dev_addr;
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dev_addr = &route->addr.dev_addr;
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rdma_addr_get_dgid(dev_addr, (union ib_gid *) &resp->ib_route[0].dgid);
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rdma_addr_get_sgid(dev_addr, (union ib_gid *) &resp->ib_route[0].sgid);
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}
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static ssize_t ucma_query_route(struct ucma_file *file,
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const char __user *inbuf,
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int in_len, int out_len)
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@ -670,8 +680,10 @@ static ssize_t ucma_query_route(struct ucma_file *file,
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resp.node_guid = (__force __u64) ctx->cm_id->device->node_guid;
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resp.port_num = ctx->cm_id->port_num;
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if (rdma_node_get_transport(ctx->cm_id->device->node_type) == RDMA_TRANSPORT_IB) {
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switch (rdma_port_get_link_layer(ctx->cm_id->device, ctx->cm_id->port_num)) {
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switch (rdma_node_get_transport(ctx->cm_id->device->node_type)) {
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case RDMA_TRANSPORT_IB:
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switch (rdma_port_get_link_layer(ctx->cm_id->device,
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ctx->cm_id->port_num)) {
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case IB_LINK_LAYER_INFINIBAND:
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ucma_copy_ib_route(&resp, &ctx->cm_id->route);
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break;
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@ -681,6 +693,12 @@ static ssize_t ucma_query_route(struct ucma_file *file,
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default:
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break;
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}
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break;
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case RDMA_TRANSPORT_IWARP:
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ucma_copy_iw_route(&resp, &ctx->cm_id->route);
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break;
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default:
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break;
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}
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out:
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@ -380,7 +380,7 @@ static void send_flowc(struct c4iw_ep *ep, struct sk_buff *skb)
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16)) | FW_WR_FLOWID(ep->hwtid));
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flowc->mnemval[0].mnemonic = FW_FLOWC_MNEM_PFNVFN;
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flowc->mnemval[0].val = cpu_to_be32(0);
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flowc->mnemval[0].val = cpu_to_be32(PCI_FUNC(ep->com.dev->rdev.lldi.pdev->devfn) << 8);
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flowc->mnemval[1].mnemonic = FW_FLOWC_MNEM_CH;
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flowc->mnemval[1].val = cpu_to_be32(ep->tx_chan);
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flowc->mnemval[2].mnemonic = FW_FLOWC_MNEM_PORT;
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@ -220,7 +220,7 @@ static int create_qp(struct c4iw_rdev *rdev, struct t4_wq *wq,
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V_FW_RI_RES_WR_DCAEN(0) |
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V_FW_RI_RES_WR_DCACPU(0) |
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V_FW_RI_RES_WR_FBMIN(2) |
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V_FW_RI_RES_WR_FBMAX(3) |
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V_FW_RI_RES_WR_FBMAX(2) |
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V_FW_RI_RES_WR_CIDXFTHRESHO(0) |
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V_FW_RI_RES_WR_CIDXFTHRESH(0) |
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V_FW_RI_RES_WR_EQSIZE(eqsize));
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@ -243,7 +243,7 @@ static int create_qp(struct c4iw_rdev *rdev, struct t4_wq *wq,
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V_FW_RI_RES_WR_DCAEN(0) |
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V_FW_RI_RES_WR_DCACPU(0) |
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V_FW_RI_RES_WR_FBMIN(2) |
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V_FW_RI_RES_WR_FBMAX(3) |
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V_FW_RI_RES_WR_FBMAX(2) |
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V_FW_RI_RES_WR_CIDXFTHRESHO(0) |
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V_FW_RI_RES_WR_CIDXFTHRESH(0) |
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V_FW_RI_RES_WR_EQSIZE(eqsize));
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@ -623,7 +623,6 @@ struct qib_chippport_specific {
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u8 ibmalfusesnap;
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struct qib_qsfp_data qsfp_data;
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char epmsgbuf[192]; /* for port error interrupt msg buffer */
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u8 bounced;
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};
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static struct {
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@ -1881,23 +1880,7 @@ static noinline void handle_7322_p_errors(struct qib_pportdata *ppd)
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IB_PHYSPORTSTATE_DISABLED)
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qib_set_ib_7322_lstate(ppd, 0,
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QLOGIC_IB_IBCC_LINKINITCMD_DISABLE);
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else {
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u32 lstate;
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/*
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* We need the current logical link state before
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* lflags are set in handle_e_ibstatuschanged.
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*/
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lstate = qib_7322_iblink_state(ibcs);
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if (IS_QMH(dd) && !ppd->cpspec->bounced &&
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ltstate == IB_PHYSPORTSTATE_LINKUP &&
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(lstate >= IB_PORT_INIT &&
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lstate <= IB_PORT_ACTIVE)) {
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ppd->cpspec->bounced = 1;
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qib_7322_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE,
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IB_LINKCMD_DOWN | IB_LINKINITCMD_POLL);
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}
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else
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/*
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* Since going into a recovery state causes the link
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* state to go down and since recovery is transitory,
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@ -1911,7 +1894,6 @@ static noinline void handle_7322_p_errors(struct qib_pportdata *ppd)
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ltstate != IB_PHYSPORTSTATE_RECOVERY_WAITRMT &&
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ltstate != IB_PHYSPORTSTATE_RECOVERY_IDLE)
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qib_handle_e_ibstatuschanged(ppd, ibcs);
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}
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}
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if (*msg && iserr)
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qib_dev_porterr(dd, ppd->port, "%s error\n", msg);
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@ -2381,6 +2363,11 @@ static int qib_7322_bringup_serdes(struct qib_pportdata *ppd)
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qib_write_kreg_port(ppd, krp_rcvctrl, ppd->p_rcvctrl);
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spin_unlock_irqrestore(&dd->cspec->rcvmod_lock, flags);
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/* Hold the link state machine for mezz boards */
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if (IS_QMH(dd) || IS_QME(dd))
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qib_set_ib_7322_lstate(ppd, 0,
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QLOGIC_IB_IBCC_LINKINITCMD_DISABLE);
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/* Also enable IBSTATUSCHG interrupt. */
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val = qib_read_kreg_port(ppd, krp_errmask);
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qib_write_kreg_port(ppd, krp_errmask,
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@ -5702,6 +5689,11 @@ static void set_no_qsfp_atten(struct qib_devdata *dd, int change)
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ppd->cpspec->h1_val = h1;
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/* now change the IBC and serdes, overriding generic */
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init_txdds_table(ppd, 1);
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/* Re-enable the physical state machine on mezz boards
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* now that the correct settings have been set. */
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if (IS_QMH(dd) || IS_QME(dd))
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qib_set_ib_7322_lstate(ppd, 0,
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QLOGIC_IB_IBCC_LINKINITCMD_SLEEP);
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any++;
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}
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if (*nxt == '\n')
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@ -1286,6 +1286,21 @@ static DEFINE_PCI_DEVICE_TABLE(mlx4_pci_table) = {
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{ PCI_VDEVICE(MELLANOX, 0x6764) }, /* MT26468 ConnectX EN 10GigE PCIe gen2*/
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{ PCI_VDEVICE(MELLANOX, 0x6746) }, /* MT26438 ConnectX EN 40GigE PCIe gen2 5GT/s */
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{ PCI_VDEVICE(MELLANOX, 0x676e) }, /* MT26478 ConnectX2 40GigE PCIe gen2 */
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{ PCI_VDEVICE(MELLANOX, 0x1002) }, /* MT25400 Family [ConnectX-2 Virtual Function] */
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{ PCI_VDEVICE(MELLANOX, 0x1003) }, /* MT27500 Family [ConnectX-3] */
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{ PCI_VDEVICE(MELLANOX, 0x1004) }, /* MT27500 Family [ConnectX-3 Virtual Function] */
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{ PCI_VDEVICE(MELLANOX, 0x1005) }, /* MT27510 Family */
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{ PCI_VDEVICE(MELLANOX, 0x1006) }, /* MT27511 Family */
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{ PCI_VDEVICE(MELLANOX, 0x1007) }, /* MT27520 Family */
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{ PCI_VDEVICE(MELLANOX, 0x1008) }, /* MT27521 Family */
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{ PCI_VDEVICE(MELLANOX, 0x1009) }, /* MT27530 Family */
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{ PCI_VDEVICE(MELLANOX, 0x100a) }, /* MT27531 Family */
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{ PCI_VDEVICE(MELLANOX, 0x100b) }, /* MT27540 Family */
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{ PCI_VDEVICE(MELLANOX, 0x100c) }, /* MT27541 Family */
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{ PCI_VDEVICE(MELLANOX, 0x100d) }, /* MT27550 Family */
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{ PCI_VDEVICE(MELLANOX, 0x100e) }, /* MT27551 Family */
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{ PCI_VDEVICE(MELLANOX, 0x100f) }, /* MT27560 Family */
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{ PCI_VDEVICE(MELLANOX, 0x1010) }, /* MT27561 Family */
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{ 0, }
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};
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