ASoC: sun8i-codec: Round up the LRCK divisor

The codec supports only power-of-two BCLK/LRCK divisors. If either the
slot width or the number of slots is not a power of two, the LRCK
divisor must be rounded up to provide enough space. To do that, use
order_base_2 (instead of ilog2, which rounds down).

Since the rounded divisor is also needed for setting the SYSCLK/BCLK
divisor, return the order base 2 instead of fully calculating the
hardware register encoding.

Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Link: https://lore.kernel.org/r/20201014061941.4306-6-samuel@sholland.org
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Samuel Holland 2020-10-14 01:19:29 -05:00 committed by Mark Brown
parent 1abb43aead
commit e511aed796
No known key found for this signature in database
GPG Key ID: 24D68B725D5487D0

View File

@ -305,15 +305,15 @@ static u8 sun8i_codec_get_bclk_div(struct sun8i_codec *scodec,
return best_val;
}
static int sun8i_codec_get_lrck_div(unsigned int channels,
unsigned int word_size)
static int sun8i_codec_get_lrck_div_order(unsigned int slots,
unsigned int slot_width)
{
unsigned int div = word_size * channels;
unsigned int div = slots * slot_width;
if (div < 16 || div > 256)
return -EINVAL;
return ilog2(div) - 4;
return order_base_2(div);
}
static int sun8i_codec_hw_params(struct snd_pcm_substream *substream,
@ -321,7 +321,9 @@ static int sun8i_codec_hw_params(struct snd_pcm_substream *substream,
struct snd_soc_dai *dai)
{
struct sun8i_codec *scodec = snd_soc_dai_get_drvdata(dai);
int lrck_div, sample_rate, word_size;
unsigned int slots = params_channels(params);
unsigned int slot_width = params_width(params);
int lrck_div_order, sample_rate, word_size;
u8 bclk_div;
/* word size */
@ -351,14 +353,14 @@ static int sun8i_codec_hw_params(struct snd_pcm_substream *substream,
SUN8I_AIF1CLK_CTRL_AIF1_BCLK_DIV_MASK,
bclk_div << SUN8I_AIF1CLK_CTRL_AIF1_BCLK_DIV);
lrck_div = sun8i_codec_get_lrck_div(params_channels(params),
params_physical_width(params));
if (lrck_div < 0)
return lrck_div;
/* LRCK divider (BCLK/LRCK ratio) */
lrck_div_order = sun8i_codec_get_lrck_div_order(slots, slot_width);
if (lrck_div_order < 0)
return lrck_div_order;
regmap_update_bits(scodec->regmap, SUN8I_AIF1CLK_CTRL,
SUN8I_AIF1CLK_CTRL_AIF1_LRCK_DIV_MASK,
lrck_div << SUN8I_AIF1CLK_CTRL_AIF1_LRCK_DIV);
(lrck_div_order - 4) << SUN8I_AIF1CLK_CTRL_AIF1_LRCK_DIV);
sample_rate = sun8i_codec_get_hw_rate(params);
if (sample_rate < 0)