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arm: dts: mt7623: update usb related nodes

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The current usb related nodes are out-of-date, so we make them be
consistent with the binding documents.

Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This commit is contained in:
Ryder Lee 2017-10-20 17:46:46 +08:00 committed by Matthias Brugger
parent a336ba44fe
commit e4316d6f2c
1 changed files with 10 additions and 6 deletions
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16
arch/arm/boot/dts/mt7623.dtsi
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@ -680,7 +680,7 @@
interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_LOW>;
clocks = <&hifsys CLK_HIFSYS_USB0PHY>,
<&topckgen CLK_TOP_ETHIF_SEL>;
clock-names = "sys_ck", "free_ck";
clock-names = "sys_ck", "ref_ck";
power-domains = <&scpsys MT2701_POWER_DOMAIN_HIF>;
phys = <&u2port0 PHY_TYPE_USB2>, <&u3port0 PHY_TYPE_USB3>;
status = "disabled";
@ -690,8 +690,6 @@
compatible = "mediatek,mt7623-u3phy",
"mediatek,mt2701-u3phy";
reg = <0 0x1a1c4000 0 0x0700>;
clocks = <&clk26m>;
clock-names = "u3phya_ref";
#address-cells = <2>;
#size-cells = <2>;
ranges;
@ -699,12 +697,16 @@
u2port0: usb-phy@1a1c4800 {
reg = <0 0x1a1c4800 0 0x0100>;
clocks = <&topckgen CLK_TOP_USB_PHY48M>;
clock-names = "ref";
#phy-cells = <1>;
status = "okay";
};
u3port0: usb-phy@1a1c4900 {
reg = <0 0x1a1c4900 0 0x0700>;
clocks = <&clk26m>;
clock-names = "ref";
#phy-cells = <1>;
status = "okay";
};
@ -719,7 +721,7 @@
interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_LOW>;
clocks = <&hifsys CLK_HIFSYS_USB1PHY>,
<&topckgen CLK_TOP_ETHIF_SEL>;
clock-names = "sys_ck", "free_ck";
clock-names = "sys_ck", "ref_ck";
power-domains = <&scpsys MT2701_POWER_DOMAIN_HIF>;
phys = <&u2port1 PHY_TYPE_USB2>, <&u3port1 PHY_TYPE_USB3>;
status = "disabled";
@ -729,8 +731,6 @@
compatible = "mediatek,mt7623-u3phy",
"mediatek,mt2701-u3phy";
reg = <0 0x1a244000 0 0x0700>;
clocks = <&clk26m>;
clock-names = "u3phya_ref";
#address-cells = <2>;
#size-cells = <2>;
ranges;
@ -738,12 +738,16 @@
u2port1: usb-phy@1a244800 {
reg = <0 0x1a244800 0 0x0100>;
clocks = <&topckgen CLK_TOP_USB_PHY48M>;
clock-names = "ref";
#phy-cells = <1>;
status = "okay";
};
u3port1: usb-phy@1a244900 {
reg = <0 0x1a244900 0 0x0700>;
clocks = <&clk26m>;
clock-names = "ref";
#phy-cells = <1>;
status = "okay";
};