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ACPICA: Resource manager: Add support for ACPI 5 wake bit in IRQ descriptor.
Add support to both get and set the extended share flags for the IRQ() resource descriptor. Reported by Aaron Lu. Signed-off-by: Aaron Lu <aaron.lu@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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@ -80,7 +80,7 @@ struct acpi_rsconvert_info acpi_rs_get_irq[8] = {
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{ACPI_RSC_EXIT_NE, ACPI_RSC_COMPARE_AML_LENGTH, 0, 3},
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/* Get flags: Triggering[0], Polarity[3], Sharing[4] */
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/* Get flags: Triggering[0], Polarity[3], sharing_and_wake[4:5] */
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{ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET(data.irq.triggering),
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AML_OFFSET(irq.flags),
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@ -90,7 +90,7 @@ struct acpi_rsconvert_info acpi_rs_get_irq[8] = {
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AML_OFFSET(irq.flags),
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3},
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{ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET(data.irq.sharable),
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{ACPI_RSC_2BITFLAG, ACPI_RS_OFFSET(data.irq.sharable),
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AML_OFFSET(irq.flags),
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4}
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};
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@ -114,7 +114,7 @@ struct acpi_rsconvert_info acpi_rs_set_irq[13] = {
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AML_OFFSET(irq.irq_mask),
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ACPI_RS_OFFSET(data.irq.interrupt_count)},
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/* Set the flags byte */
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/* Set flags: Triggering[0], Polarity[3], sharing_and_wake[4:5] */
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{ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET(data.irq.triggering),
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AML_OFFSET(irq.flags),
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@ -124,7 +124,7 @@ struct acpi_rsconvert_info acpi_rs_set_irq[13] = {
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AML_OFFSET(irq.flags),
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3},
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{ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET(data.irq.sharable),
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{ACPI_RSC_2BITFLAG, ACPI_RS_OFFSET(data.irq.sharable),
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AML_OFFSET(irq.flags),
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4},
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