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drm/exynos: fix incorrect interrupt induced by m2m operation.

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This patch fixes incorrect interrupt induced by m2m operation.
the m2m operation calls s/w reset every frame but there is the case that
the interrupt to m2m operation occures after s/w reset sometimes.
So this patch makes dma and capture operations stop at s/w reset
to avoid incorrect interrupt.

Signed-off-by: Jinyoung Jeon <jy0.jeon@samsung.com>
Signed-off-by: Eunchul Kim <chulspro.kim@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
This commit is contained in:
Jinyoung Jeon 2012-12-22 17:49:28 +09:00 committed by Inki Dae
parent b5c0b5526a
commit e39d5ce132
1 changed files with 13 additions and 0 deletions
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13
drivers/gpu/drm/exynos/exynos_drm_fimc.c
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@ -169,10 +169,23 @@ static void fimc_sw_reset(struct fimc_context *ctx)
DRM_DEBUG_KMS("%s\n", __func__);
/* stop dma operation */
cfg = fimc_read(EXYNOS_CISTATUS);
if (EXYNOS_CISTATUS_GET_ENVID_STATUS(cfg)) {
cfg = fimc_read(EXYNOS_MSCTRL);
cfg &= ~EXYNOS_MSCTRL_ENVID;
fimc_write(cfg, EXYNOS_MSCTRL);
}
cfg = fimc_read(EXYNOS_CISRCFMT);
cfg |= EXYNOS_CISRCFMT_ITU601_8BIT;
fimc_write(cfg, EXYNOS_CISRCFMT);
/* disable image capture */
cfg = fimc_read(EXYNOS_CIIMGCPT);
cfg &= ~(EXYNOS_CIIMGCPT_IMGCPTEN_SC | EXYNOS_CIIMGCPT_IMGCPTEN);
fimc_write(cfg, EXYNOS_CIIMGCPT);
/* s/w reset */
cfg = fimc_read(EXYNOS_CIGCTRL);
cfg |= (EXYNOS_CIGCTRL_SWRST);