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USB: ehci-atmel: rework clk handling
The EHCI IP only needs the UTMI/UPLL (uclk) and the peripheral (iclk) clocks to work properly. Remove the useless system clock (fclk). Avoid calling set_rate on the fixed rate UTMI/IPLL clock and remove useless IS_ENABLED(CONFIG_COMMON_CLK) tests (all at91 platforms have been moved to the CCF). This patch also fixes a bug introduced by3440ef1
(ARM: at91/dt: fix USB high-speed clock to select UTMI), which was leaving the usb clock uninitialized and preventing the OHCI driver from setting the usb clock rate to 48MHz. This bug was caused by several things: 1/ usb clock drivers set the CLK_SET_RATE_GATE flag, which means the rate cannot be changed once the clock is prepared 2/ The EHCI driver was retrieving and preparing/enabling the uhpck clock which was in turn preparing its parent clock (the usb clock), thus preventing any rate change because of 1/ Fixes:3440ef1691
("ARM: at91/dt: fix USB high-speed clock to select UTMI") Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Alan Stern <stern@rowland.harvard.edu> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -34,7 +34,6 @@ static const char hcd_name[] = "ehci-atmel";
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struct atmel_ehci_priv {
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struct clk *iclk;
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struct clk *fclk;
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struct clk *uclk;
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bool clocked;
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};
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@ -51,12 +50,9 @@ static void atmel_start_clock(struct atmel_ehci_priv *atmel_ehci)
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{
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if (atmel_ehci->clocked)
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return;
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if (IS_ENABLED(CONFIG_COMMON_CLK)) {
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clk_set_rate(atmel_ehci->uclk, 48000000);
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clk_prepare_enable(atmel_ehci->uclk);
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}
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clk_prepare_enable(atmel_ehci->uclk);
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clk_prepare_enable(atmel_ehci->iclk);
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clk_prepare_enable(atmel_ehci->fclk);
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atmel_ehci->clocked = true;
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}
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@ -64,10 +60,9 @@ static void atmel_stop_clock(struct atmel_ehci_priv *atmel_ehci)
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{
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if (!atmel_ehci->clocked)
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return;
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clk_disable_unprepare(atmel_ehci->fclk);
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clk_disable_unprepare(atmel_ehci->iclk);
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if (IS_ENABLED(CONFIG_COMMON_CLK))
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clk_disable_unprepare(atmel_ehci->uclk);
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clk_disable_unprepare(atmel_ehci->uclk);
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atmel_ehci->clocked = false;
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}
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@ -146,20 +141,13 @@ static int ehci_atmel_drv_probe(struct platform_device *pdev)
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retval = -ENOENT;
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goto fail_request_resource;
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}
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atmel_ehci->fclk = devm_clk_get(&pdev->dev, "uhpck");
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if (IS_ERR(atmel_ehci->fclk)) {
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dev_err(&pdev->dev, "Error getting function clock\n");
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retval = -ENOENT;
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atmel_ehci->uclk = devm_clk_get(&pdev->dev, "usb_clk");
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if (IS_ERR(atmel_ehci->uclk)) {
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dev_err(&pdev->dev, "failed to get uclk\n");
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retval = PTR_ERR(atmel_ehci->uclk);
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goto fail_request_resource;
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}
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if (IS_ENABLED(CONFIG_COMMON_CLK)) {
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atmel_ehci->uclk = devm_clk_get(&pdev->dev, "usb_clk");
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if (IS_ERR(atmel_ehci->uclk)) {
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dev_err(&pdev->dev, "failed to get uclk\n");
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retval = PTR_ERR(atmel_ehci->uclk);
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goto fail_request_resource;
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}
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}
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ehci = hcd_to_ehci(hcd);
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/* registers start at offset 0x0 */
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