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ARM: Use genirq definitions from kernel/irq/Kconfig.
Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
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@ -26,6 +26,8 @@ config ARM
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select HAVE_REGS_AND_STACK_ACCESS_API
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select HAVE_REGS_AND_STACK_ACCESS_API
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select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V7))
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select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V7))
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select HAVE_C_RECORDMCOUNT
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select HAVE_C_RECORDMCOUNT
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select HAVE_GENERIC_HARDIRQS
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select HAVE_SPARSE_IRQ
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help
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help
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The ARM series is a line of low-power-consumption RISC chip designs
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The ARM series is a line of low-power-consumption RISC chip designs
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licensed by ARM Ltd and targeted at embedded applications and
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licensed by ARM Ltd and targeted at embedded applications and
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@ -97,10 +99,6 @@ config MCA
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<file:Documentation/mca.txt> (and especially the web page given
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<file:Documentation/mca.txt> (and especially the web page given
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there) before attempting to build an MCA bus kernel.
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there) before attempting to build an MCA bus kernel.
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config GENERIC_HARDIRQS
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bool
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default y
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config STACKTRACE_SUPPORT
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config STACKTRACE_SUPPORT
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bool
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bool
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default y
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default y
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@ -180,9 +178,6 @@ config FIQ
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config ARCH_MTD_XIP
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config ARCH_MTD_XIP
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bool
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bool
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config GENERIC_HARDIRQS_NO__DO_IRQ
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def_bool y
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config ARM_L1_CACHE_SHIFT_6
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config ARM_L1_CACHE_SHIFT_6
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bool
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bool
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help
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help
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@ -1452,15 +1447,6 @@ config HW_PERF_EVENTS
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Enable hardware performance counter support for perf events. If
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Enable hardware performance counter support for perf events. If
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disabled, perf events will use software events only.
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disabled, perf events will use software events only.
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config SPARSE_IRQ
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def_bool n
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help
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This enables support for sparse irqs. This is useful in general
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as most CPUs have a fairly sparse array of IRQ vectors, which
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the irq_desc then maps directly on to. Systems with a high
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number of off-chip IRQs will want to treat this as
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experimental until they have been independently verified.
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source "mm/Kconfig"
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source "mm/Kconfig"
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config FORCE_MAX_ZONEORDER
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config FORCE_MAX_ZONEORDER
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