clk: at91: clk-master: add 5th divisor for mck master

clk-master can have 5 divisors with a field width of 3 bits
on some products.

Change the mask and number of divisors accordingly.

Reported-by: Mihai Sain <mihai.sain@microchip.com>
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/1605800597-16720-5-git-send-email-claudiu.beznea@microchip.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This commit is contained in:
Eugen Hristev 2020-11-19 17:43:10 +02:00 committed by Stephen Boyd
parent 83d0028773
commit e26b3006ff
2 changed files with 2 additions and 2 deletions

View File

@ -15,7 +15,7 @@
#define MASTER_PRES_MASK 0x7 #define MASTER_PRES_MASK 0x7
#define MASTER_PRES_MAX MASTER_PRES_MASK #define MASTER_PRES_MAX MASTER_PRES_MASK
#define MASTER_DIV_SHIFT 8 #define MASTER_DIV_SHIFT 8
#define MASTER_DIV_MASK 0x3 #define MASTER_DIV_MASK 0x7
#define PMC_MCR 0x30 #define PMC_MCR 0x30
#define PMC_MCR_ID_MSK GENMASK(3, 0) #define PMC_MCR_ID_MSK GENMASK(3, 0)

View File

@ -48,7 +48,7 @@ extern const struct clk_master_layout at91sam9x5_master_layout;
struct clk_master_characteristics { struct clk_master_characteristics {
struct clk_range output; struct clk_range output;
u32 divisors[4]; u32 divisors[5];
u8 have_div3_pres; u8 have_div3_pres;
}; };