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clk: at91: clk-master: add 5th divisor for mck master
clk-master can have 5 divisors with a field width of 3 bits on some products. Change the mask and number of divisors accordingly. Reported-by: Mihai Sain <mihai.sain@microchip.com> Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/1605800597-16720-5-git-send-email-claudiu.beznea@microchip.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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@ -15,7 +15,7 @@
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#define MASTER_PRES_MASK 0x7
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#define MASTER_PRES_MAX MASTER_PRES_MASK
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#define MASTER_DIV_SHIFT 8
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#define MASTER_DIV_MASK 0x3
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#define MASTER_DIV_MASK 0x7
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#define PMC_MCR 0x30
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#define PMC_MCR_ID_MSK GENMASK(3, 0)
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@ -48,7 +48,7 @@ extern const struct clk_master_layout at91sam9x5_master_layout;
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struct clk_master_characteristics {
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struct clk_range output;
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u32 divisors[4];
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u32 divisors[5];
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u8 have_div3_pres;
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};
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