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PCI/PTM: Add pci_upstream_ptm() helper
PTM requires an unbroken path of PTM-supporting devices between the PTM Root and the ultimate PTM Requester, but if a Switch supports PTM, only the Upstream Port can have a PTM Capability; the Downstream Ports do not. Previously we copied the PTM configuration from the Switch Upstream Port to the Downstream Ports so dev->ptm_enabled for any device implied that all the upstream devices support PTM. Instead of making it look like Downstream Ports have their own PTM config, add pci_upstream_ptm(), which returns the upstream device that has a PTM Capability (either a Root Port or a Switch Upstream Port). Link: https://lore.kernel.org/r/20220909202505.314195-3-helgaas@kernel.org Tested-by: Rajvi Jingar <rajvi.jingar@linux.intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
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@ -76,6 +76,29 @@ void pci_restore_ptm_state(struct pci_dev *dev)
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pci_write_config_word(dev, ptm + PCI_PTM_CTRL, *cap);
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}
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/*
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* If the next upstream device supports PTM, return it; otherwise return
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* NULL. PTM Messages are local, so both link partners must support it.
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*/
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static struct pci_dev *pci_upstream_ptm(struct pci_dev *dev)
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{
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struct pci_dev *ups = pci_upstream_bridge(dev);
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/*
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* Switch Downstream Ports are not permitted to have a PTM
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* capability; their PTM behavior is controlled by the Upstream
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* Port (PCIe r5.0, sec 7.9.16), so if the upstream bridge is a
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* Switch Downstream Port, look up one more level.
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*/
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if (ups && pci_pcie_type(ups) == PCI_EXP_TYPE_DOWNSTREAM)
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ups = pci_upstream_bridge(ups);
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if (ups && ups->ptm_cap)
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return ups;
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return NULL;
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}
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void pci_ptm_init(struct pci_dev *dev)
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{
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u16 ptm;
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@ -95,19 +118,6 @@ void pci_ptm_init(struct pci_dev *dev)
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pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END))
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return;
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/*
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* Switch Downstream Ports are not permitted to have a PTM
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* capability; their PTM behavior is controlled by the Upstream
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* Port (PCIe r5.0, sec 7.9.16).
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*/
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ups = pci_upstream_bridge(dev);
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if (pci_pcie_type(dev) == PCI_EXP_TYPE_DOWNSTREAM &&
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ups && ups->ptm_enabled) {
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dev->ptm_granularity = ups->ptm_granularity;
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dev->ptm_enabled = 1;
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return;
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}
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ptm = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_PTM);
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if (!ptm)
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return;
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@ -124,6 +134,7 @@ void pci_ptm_init(struct pci_dev *dev)
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* the spec recommendation (PCIe r3.1, sec 7.32.3), select the
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* furthest upstream Time Source as the PTM Root.
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*/
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ups = pci_upstream_ptm(dev);
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if (ups && ups->ptm_enabled) {
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ctrl = PCI_PTM_CTRL_ENABLE;
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if (ups->ptm_granularity == 0)
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@ -173,7 +184,7 @@ int pci_enable_ptm(struct pci_dev *dev, u8 *granularity)
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* associate the endpoint with a time source.
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*/
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if (pci_pcie_type(dev) == PCI_EXP_TYPE_ENDPOINT) {
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ups = pci_upstream_bridge(dev);
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ups = pci_upstream_ptm(dev);
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if (!ups || !ups->ptm_enabled)
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return -EINVAL;
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