perf vendor events: Add JSON metrics for imx8mm DDR Perf

Add JSON metrics for imx8mm DDR Perf.

Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Acked-by: Kajol Jain <kjain@linux.ibm.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ian Rogers <irogers@google.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: John Garry <john.garry@huawei.com>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Kim Phillips <kim.phillips@amd.com>
Cc: Leo Yan <leo.yan@linaro.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Will Deacon <will@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxarm@huawei.com
Signed-off-by: John Garry <john.garry@huawei.com>
Link: http://lore.kernel.org/lkml/1607080216-36968-11-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
This commit is contained in:
Joakim Zhang 2020-12-04 19:10:16 +08:00 committed by Arnaldo Carvalho de Melo
parent be335ec28e
commit e15a536521
3 changed files with 59 additions and 0 deletions

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@ -0,0 +1,39 @@
[
{
"BriefDescription": "ddr cycles event",
"EventCode": "0x00",
"EventName": "imx8mm_ddr.cycles",
"Unit": "imx8_ddr",
"Compat": "i.MX8MM"
},
{
"BriefDescription": "ddr read-cycles event",
"EventCode": "0x2a",
"EventName": "imx8mm_ddr.read_cycles",
"Unit": "imx8_ddr",
"Compat": "i.MX8MM"
},
{
"BriefDescription": "ddr write-cycles event",
"EventCode": "0x2b",
"EventName": "imx8mm_ddr.write_cycles",
"Unit": "imx8_ddr",
"Compat": "i.MX8MM"
},
{
"BriefDescription": "ddr read event",
"EventCode": "0x35",
"EventName": "imx8mm_ddr.read",
"Unit": "imx8_ddr",
"Compat": "i.MX8MM"
},
{
"BriefDescription": "ddr write event",
"EventCode": "0x38",
"EventName": "imx8mm_ddr.write",
"Unit": "imx8_ddr",
"Compat": "i.MX8MM"
}
]

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@ -0,0 +1,18 @@
[
{
"BriefDescription": "bytes all masters read from ddr based on read-cycles event",
"MetricName": "imx8mm_ddr_read.all",
"MetricExpr": "imx8mm_ddr.read_cycles * 4 * 4",
"ScaleUnit": "9.765625e-4KB",
"Unit": "imx8_ddr",
"Compat": "i.MX8MM"
},
{
"BriefDescription": "bytes all masters write to ddr based on write-cycles event",
"MetricName": "imx8mm_ddr_write.all",
"MetricExpr": "imx8mm_ddr.write_cycles * 4 * 4",
"ScaleUnit": "9.765625e-4KB",
"Unit": "imx8_ddr",
"Compat": "i.MX8MM"
}
]

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@ -281,6 +281,8 @@ static struct map {
{ "hisi_sccl,ddrc", "hisi_sccl,ddrc" },
{ "hisi_sccl,hha", "hisi_sccl,hha" },
{ "hisi_sccl,l3c", "hisi_sccl,l3c" },
/* it's not realistic to keep adding these, we need something more scalable ... */
{ "imx8_ddr", "imx8_ddr" },
{ "L3PMC", "amd_l3" },
{ "DFPMC", "amd_df" },
{}