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x86: rename X86_GENERICARCH to X86_32_NON_STANDARD
X86_GENERICARCH is a misnomer - it contains non-PC 32-bit architectures that are not included in the default build. Rename it to X86_32_NON_STANDARD. Signed-off-by: Ingo Molnar <mingo@elte.hu>
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@ -344,7 +344,7 @@ config X86_VOYAGER
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If you do not specifically know you have a Voyager based machine,
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say N here, otherwise the kernel you build will not be bootable.
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config X86_GENERICARCH
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config X86_32_NON_STANDARD
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bool "Support non-standard 32-bit SMP architectures"
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depends on X86_32 && SMP
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depends on X86_NON_STANDARD
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@ -356,7 +356,7 @@ config X86_GENERICARCH
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config X86_NUMAQ
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bool "NUMAQ (IBM/Sequent)"
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depends on X86_GENERICARCH
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depends on X86_32_NON_STANDARD
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select NUMA
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select X86_MPPARSE
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help
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@ -368,21 +368,21 @@ config X86_NUMAQ
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config X86_SUMMIT
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bool "Summit/EXA (IBM x440)"
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depends on X86_GENERICARCH
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depends on X86_32_NON_STANDARD
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help
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This option is needed for IBM systems that use the Summit/EXA chipset.
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In particular, it is needed for the x440.
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config X86_ES7000
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bool "Support for Unisys ES7000 IA32 series"
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depends on X86_GENERICARCH
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depends on X86_32_NON_STANDARD
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help
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Support for Unisys ES7000 systems. Say 'Y' here if this kernel is
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supposed to run on an IA32-based Unisys ES7000 system.
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config X86_BIGSMP
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bool "Support for big SMP systems with more than 8 CPUs"
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depends on X86_GENERICARCH
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depends on X86_32_NON_STANDARD
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help
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This option is needed for the systems that have more than 8 CPUs
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and if the system is not of any sub-arch type above.
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@ -475,11 +475,11 @@ config MEMTEST
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config X86_SUMMIT_NUMA
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def_bool y
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depends on X86_32 && NUMA && X86_GENERICARCH
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depends on X86_32 && NUMA && X86_32_NON_STANDARD
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config X86_CYCLONE_TIMER
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def_bool y
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depends on X86_GENERICARCH
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depends on X86_32_NON_STANDARD
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source "arch/x86/Kconfig.cpu"
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@ -651,7 +651,7 @@ source "kernel/Kconfig.preempt"
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config X86_UP_APIC
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bool "Local APIC support on uniprocessors"
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depends on X86_32 && !SMP && !X86_GENERICARCH
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depends on X86_32 && !SMP && !X86_32_NON_STANDARD
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help
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A local APIC (Advanced Programmable Interrupt Controller) is an
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integrated interrupt controller in the CPU. If you have a single-CPU
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@ -676,11 +676,11 @@ config X86_UP_IOAPIC
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config X86_LOCAL_APIC
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def_bool y
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depends on X86_64 || SMP || X86_GENERICARCH || X86_UP_APIC
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depends on X86_64 || SMP || X86_32_NON_STANDARD || X86_UP_APIC
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config X86_IO_APIC
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def_bool y
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depends on X86_64 || SMP || X86_GENERICARCH || X86_UP_APIC
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depends on X86_64 || SMP || X86_32_NON_STANDARD || X86_UP_APIC
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config X86_VISWS_APIC
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def_bool y
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@ -1122,7 +1122,7 @@ config ARCH_SPARSEMEM_DEFAULT
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config ARCH_SPARSEMEM_ENABLE
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def_bool y
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depends on X86_64 || NUMA || (EXPERIMENTAL && X86_PC) || X86_GENERICARCH
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depends on X86_64 || NUMA || (EXPERIMENTAL && X86_PC) || X86_32_NON_STANDARD
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select SPARSEMEM_STATIC if X86_32
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select SPARSEMEM_VMEMMAP_ENABLE if X86_64
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@ -1335,7 +1335,7 @@ static void __init acpi_process_madt(void)
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if (!error) {
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acpi_lapic = 1;
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#ifdef CONFIG_X86_GENERICARCH
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#ifdef CONFIG_X86_32_NON_STANDARD
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generic_bigsmp_probe();
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#endif
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/*
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@ -372,7 +372,7 @@ static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early)
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(*x86_quirks->mpc_record)++;
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}
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#ifdef CONFIG_X86_GENERICARCH
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#ifdef CONFIG_X86_32_NON_STANDARD
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generic_bigsmp_probe();
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#endif
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@ -936,7 +936,7 @@ void __init setup_arch(char **cmdline_p)
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map_vsyscall();
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#endif
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#ifdef CONFIG_X86_GENERICARCH
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#ifdef CONFIG_X86_32_NON_STANDARD
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generic_apic_probe();
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#endif
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@ -1007,7 +1007,7 @@ static int __init smp_sanity_check(unsigned max_cpus)
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printk(KERN_WARNING
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"More than 8 CPUs detected - skipping them.\n"
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"Use CONFIG_X86_GENERICARCH and CONFIG_X86_BIGSMP.\n");
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"Use CONFIG_X86_32_NON_STANDARD and CONFIG_X86_BIGSMP.\n");
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nr = 0;
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for_each_present_cpu(cpu) {
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@ -273,7 +273,7 @@ config MTD_NAND_CAFE
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config MTD_NAND_CS553X
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tristate "NAND support for CS5535/CS5536 (AMD Geode companion chip)"
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depends on X86_32 && (X86_PC || X86_GENERICARCH)
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depends on X86_32 && (X86_PC || X86_32_NON_STANDARD)
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help
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The CS553x companion chips for the AMD Geode processor
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include NAND flash controllers with built-in hardware ECC
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