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PCI: v3-semi: Use pci_parse_request_of_pci_ranges()

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Convert V3 host bridge to use the common
pci_parse_request_of_pci_ranges().

Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Andrew Murray <andrew.murray@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
This commit is contained in:
Rob Herring 2019-10-28 11:32:43 -05:00 committed by Lorenzo Pieralisi
parent 62240a8800
commit e0aebfe84a
1 changed files with 6 additions and 29 deletions
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35
drivers/pci/controller/pci-v3-semi.c
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@ -241,10 +241,8 @@ struct v3_pci {
void __iomem *config_base;
struct pci_bus *bus;
u32 config_mem;
u32 io_mem;
u32 non_pre_mem;
u32 pre_mem;
phys_addr_t io_bus_addr;
phys_addr_t non_pre_bus_addr;
phys_addr_t pre_bus_addr;
struct regmap *map;
@ -520,35 +518,22 @@ static int v3_integrator_init(struct v3_pci *v3)
}
static int v3_pci_setup_resource(struct v3_pci *v3,
resource_size_t io_base,
struct pci_host_bridge *host,
struct resource_entry *win)
{
struct device *dev = v3->dev;
struct resource *mem;
struct resource *io;
int ret;
switch (resource_type(win->res)) {
case IORESOURCE_IO:
io = win->res;
io->name = "V3 PCI I/O";
v3->io_mem = io_base;
v3->io_bus_addr = io->start - win->offset;
dev_dbg(dev, "I/O window %pR, bus addr %pap\n",
io, &v3->io_bus_addr);
ret = devm_pci_remap_iospace(dev, io, io_base);
if (ret) {
dev_warn(dev,
"error %d: failed to map resource %pR\n",
ret, io);
return ret;
}
/* Setup window 2 - PCI I/O */
writel(v3_addr_to_lb_base2(v3->io_mem) |
writel(v3_addr_to_lb_base2(pci_pio_to_address(io->start)) |
V3_LB_BASE2_ENABLE,
v3->base + V3_LB_BASE2);
writew(v3_addr_to_lb_map2(v3->io_bus_addr),
writew(v3_addr_to_lb_map2(io->start - win->offset),
v3->base + V3_LB_MAP2);
break;
case IORESOURCE_MEM:
@ -732,7 +717,6 @@ static int v3_pci_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct device_node *np = dev->of_node;
resource_size_t io_base;
struct resource *regs;
struct resource_entry *win;
struct v3_pci *v3;
@ -741,7 +725,6 @@ static int v3_pci_probe(struct platform_device *pdev)
u16 val;
int irq;
int ret;
LIST_HEAD(res);
host = pci_alloc_host_bridge(sizeof(*v3));
if (!host)
@ -793,12 +776,7 @@ static int v3_pci_probe(struct platform_device *pdev)
if (IS_ERR(v3->config_base))
return PTR_ERR(v3->config_base);
ret = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff, &res,
&io_base);
if (ret)
return ret;
ret = devm_request_pci_bus_resources(dev, &res);
ret = pci_parse_request_of_pci_ranges(dev, &host->windows, NULL);
if (ret)
return ret;
@ -852,8 +830,8 @@ static int v3_pci_probe(struct platform_device *pdev)
writew(val, v3->base + V3_PCI_CMD);
/* Get the I/O and memory ranges from DT */
resource_list_for_each_entry(win, &res) {
ret = v3_pci_setup_resource(v3, io_base, host, win);
resource_list_for_each_entry(win, &host->windows) {
ret = v3_pci_setup_resource(v3, host, win);
if (ret) {
dev_err(dev, "error setting up resources\n");
return ret;
@ -931,7 +909,6 @@ static int v3_pci_probe(struct platform_device *pdev)
val |= V3_SYSTEM_M_LOCK;
writew(val, v3->base + V3_SYSTEM);
list_splice_init(&res, &host->windows);
ret = pci_scan_root_bus_bridge(host);
if (ret) {
dev_err(dev, "failed to register host: %d\n", ret);