ARM: SoC fixes for 6.10, part 3

Most of these changes are Qualcomm SoC specific and came in just after
 I sent out the last set of fixes. This includes two regression fixes
 for SoC drivers, a defconfig change to ensure the Lenovo X13s is
 usable and 11 changes to DT files to fix regressions and minor
 platform specific issues.
 
 Tony and Chunyan step back from their respective maintainership roles
 on the omap and unisoc platforms, and Christophe in turn takes over
 maintaining some of the Freescale SoC drivers that he has been taking
 care of in practice already.
 
 Lastly, there are two trivial fixes for the davinci and sunxi
 platforms.
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Merge tag 'arm-fixes-6.10-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC fixes from Arnd Bergmann:
 "Most of these changes are Qualcomm SoC specific and came in just after
  I sent out the last set of fixes. This includes two regression fixes
  for SoC drivers, a defconfig change to ensure the Lenovo X13s is
  usable and 11 changes to DT files to fix regressions and minor
  platform specific issues.

  Tony and Chunyan step back from their respective maintainership roles
  on the omap and unisoc platforms, and Christophe in turn takes over
  maintaining some of the Freescale SoC drivers that he has been taking
  care of in practice already.

  Lastly, there are two trivial fixes for the davinci and sunxi
  platforms"

* tag 'arm-fixes-6.10-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  MAINTAINERS: Update FREESCALE SOC DRIVERS and QUICC ENGINE LIBRARY
  MAINTAINERS: Add more maintainers for omaps
  ARM: davinci: Convert comma to semicolon
  MAINTAINERS: Move myself from SPRD Maintainer to Reviewer
  Revert "dt-bindings: cache: qcom,llcc: correct QDU1000 reg entries"
  arm64: dts: qcom: qdu1000: Fix LLCC reg property
  arm64: dts: qcom: sm6115: add iommu for sdhc_1
  arm64: dts: qcom: x1e80100-crd: fix DAI used for headset recording
  arm64: dts: qcom: x1e80100-crd: fix WCD audio codec TX port mapping
  soc: qcom: pmic_glink: disable UCSI on sc8280xp
  arm64: defconfig: enable Elan i2c-hid driver
  arm64: dts: qcom: sc8280xp-crd: use external pull up for touch reset
  arm64: dts: qcom: sc8280xp-x13s: fix touchscreen power on
  arm64: dts: qcom: x1e80100: Fix PCIe 6a reg offsets and add MHI
  arm64: dts: qcom: sa8775p: Correct IRQ number of EL2 non-secure physical timer
  arm64: dts: allwinner: Fix PMIC interrupt number
  arm64: dts: qcom: sc8280xp: Set status = "reserved" on PSHOLD
  arm64: dts: qcom: x1e80100-*: Allocate some CMA buffers
  arm64: dts: qcom: sc8180x: Fix LLCC reg property again
This commit is contained in:
Linus Torvalds 2024-07-12 09:00:25 -07:00
commit e091caf99f
16 changed files with 78 additions and 28 deletions

View File

@ -66,7 +66,6 @@ allOf:
compatible:
contains:
enum:
- qcom,qdu1000-llcc
- qcom,sc7180-llcc
- qcom,sm6350-llcc
then:
@ -104,6 +103,7 @@ allOf:
compatible:
contains:
enum:
- qcom,qdu1000-llcc
- qcom,sc8180x-llcc
- qcom,sc8280xp-llcc
- qcom,x1e80100-llcc

View File

@ -2892,7 +2892,7 @@ F: drivers/edac/altera_edac.[ch]
ARM/SPREADTRUM SoC SUPPORT
M: Orson Zhai <orsonzhai@gmail.com>
M: Baolin Wang <baolin.wang7@gmail.com>
M: Chunyan Zhang <zhang.lyra@gmail.com>
R: Chunyan Zhang <zhang.lyra@gmail.com>
S: Maintained
F: arch/arm64/boot/dts/sprd
N: sprd
@ -8832,6 +8832,7 @@ F: drivers/spi/spi-fsl-qspi.c
FREESCALE QUICC ENGINE LIBRARY
M: Qiang Zhao <qiang.zhao@nxp.com>
M: Christophe Leroy <christophe.leroy@csgroup.eu>
L: linuxppc-dev@lists.ozlabs.org
S: Maintained
F: drivers/soc/fsl/qe/
@ -8881,9 +8882,10 @@ S: Maintained
F: drivers/tty/serial/ucc_uart.c
FREESCALE SOC DRIVERS
M: Christophe Leroy <christophe.leroy@csgroup.eu>
L: linuxppc-dev@lists.ozlabs.org
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Orphan
S: Maintained
F: Documentation/devicetree/bindings/misc/fsl,dpaa2-console.yaml
F: Documentation/devicetree/bindings/soc/fsl/
F: drivers/soc/fsl/
@ -16445,7 +16447,7 @@ F: arch/arm/boot/dts/ti/omap/am335x-nano.dts
OMAP1 SUPPORT
M: Aaro Koskinen <aaro.koskinen@iki.fi>
M: Janusz Krzysztofik <jmkrzyszt@gmail.com>
M: Tony Lindgren <tony@atomide.com>
R: Tony Lindgren <tony@atomide.com>
L: linux-omap@vger.kernel.org
S: Maintained
Q: http://patchwork.kernel.org/project/linux-omap/list/
@ -16457,10 +16459,13 @@ F: include/linux/platform_data/ams-delta-fiq.h
F: include/linux/platform_data/i2c-omap.h
OMAP2+ SUPPORT
M: Aaro Koskinen <aaro.koskinen@iki.fi>
M: Andreas Kemnade <andreas@kemnade.info>
M: Kevin Hilman <khilman@baylibre.com>
M: Roger Quadros <rogerq@kernel.org>
M: Tony Lindgren <tony@atomide.com>
L: linux-omap@vger.kernel.org
S: Maintained
W: http://www.muru.com/linux/omap/
W: http://linux.omap.com/
Q: http://patchwork.kernel.org/project/linux-omap/list/
T: git git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap.git

View File

@ -61,7 +61,7 @@ static void davinci_pm_suspend(void)
/* Configure sleep count in deep sleep register */
val = __raw_readl(pm_config.deepsleep_reg);
val &= ~DEEPSLEEP_SLEEPCOUNT_MASK,
val &= ~DEEPSLEEP_SLEEPCOUNT_MASK;
val |= pm_config.sleepcount;
__raw_writel(val, pm_config.deepsleep_reg);

View File

@ -191,7 +191,7 @@
compatible = "x-powers,axp803";
reg = <0x3a3>;
interrupt-parent = <&r_intc>;
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_LOW>;
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_LOW>;
x-powers,drive-vbus-en;
vin1-supply = <&reg_vcc5v>;

View File

@ -1459,9 +1459,23 @@
system-cache-controller@19200000 {
compatible = "qcom,qdu1000-llcc";
reg = <0 0x19200000 0 0xd80000>,
reg = <0 0x19200000 0 0x80000>,
<0 0x19300000 0 0x80000>,
<0 0x19600000 0 0x80000>,
<0 0x19700000 0 0x80000>,
<0 0x19a00000 0 0x80000>,
<0 0x19b00000 0 0x80000>,
<0 0x19e00000 0 0x80000>,
<0 0x19f00000 0 0x80000>,
<0 0x1a200000 0 0x80000>;
reg-names = "llcc0_base",
"llcc1_base",
"llcc2_base",
"llcc3_base",
"llcc4_base",
"llcc5_base",
"llcc6_base",
"llcc7_base",
"llcc_broadcast_base";
interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
};

View File

@ -3605,7 +3605,7 @@
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 12 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
};
pcie0: pcie@1c00000 {

View File

@ -2647,11 +2647,14 @@
system-cache-controller@9200000 {
compatible = "qcom,sc8180x-llcc";
reg = <0 0x09200000 0 0x50000>, <0 0x09280000 0 0x50000>,
<0 0x09300000 0 0x50000>, <0 0x09380000 0 0x50000>,
<0 0x09600000 0 0x50000>;
reg = <0 0x09200000 0 0x58000>, <0 0x09280000 0 0x58000>,
<0 0x09300000 0 0x58000>, <0 0x09380000 0 0x58000>,
<0 0x09400000 0 0x58000>, <0 0x09480000 0 0x58000>,
<0 0x09500000 0 0x58000>, <0 0x09580000 0 0x58000>,
<0 0x09600000 0 0x58000>;
reg-names = "llcc0_base", "llcc1_base", "llcc2_base",
"llcc3_base", "llcc_broadcast_base";
"llcc3_base", "llcc4_base", "llcc5_base",
"llcc6_base", "llcc7_base", "llcc_broadcast_base";
interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>;
};

View File

@ -977,8 +977,7 @@
reset-n-pins {
pins = "gpio99";
function = "gpio";
output-high;
drive-strength = <16>;
bias-disable;
};
};

View File

@ -655,15 +655,16 @@
status = "okay";
/* FIXME: verify */
touchscreen@10 {
compatible = "hid-over-i2c";
compatible = "elan,ekth5015m", "elan,ekth6915";
reg = <0x10>;
hid-descr-addr = <0x1>;
interrupts-extended = <&tlmm 175 IRQ_TYPE_LEVEL_LOW>;
vdd-supply = <&vreg_misc_3p3>;
vddl-supply = <&vreg_s10b>;
reset-gpios = <&tlmm 99 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
no-reset-on-power-off;
vcc33-supply = <&vreg_misc_3p3>;
vccio-supply = <&vreg_misc_3p3>;
pinctrl-names = "default";
pinctrl-0 = <&ts0_default>;
@ -1496,8 +1497,8 @@
reset-n-pins {
pins = "gpio99";
function = "gpio";
output-high;
drive-strength = <16>;
drive-strength = <2>;
bias-disable;
};
};

View File

@ -4623,6 +4623,8 @@
restart@c264000 {
compatible = "qcom,pshold";
reg = <0 0x0c264000 0 0x4>;
/* TZ seems to block access */
status = "reserved";
};
tsens1: thermal-sensor@c265000 {

View File

@ -1090,6 +1090,7 @@
power-domains = <&rpmpd SM6115_VDDCX>;
operating-points-v2 = <&sdhc1_opp_table>;
iommus = <&apps_smmu 0x00c0 0x0>;
interconnects = <&system_noc MASTER_SDCC_1 RPM_ALWAYS_TAG
&bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>,
<&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG

View File

@ -49,6 +49,15 @@
stdout-path = "serial0:115200n8";
};
reserved-memory {
linux,cma {
compatible = "shared-dma-pool";
size = <0x0 0x8000000>;
reusable;
linux,cma-default;
};
};
sound {
compatible = "qcom,x1e80100-sndcard";
model = "X1E80100-CRD";
@ -93,7 +102,7 @@
};
codec {
sound-dai = <&wcd938x 1>, <&swr2 0>, <&lpass_txmacro 0>;
sound-dai = <&wcd938x 1>, <&swr2 1>, <&lpass_txmacro 0>;
};
platform {
@ -744,7 +753,7 @@
wcd_tx: codec@0,3 {
compatible = "sdw20217010d00";
reg = <0 3>;
qcom,tx-port-mapping = <1 1 2 3>;
qcom,tx-port-mapping = <2 2 3 4>;
};
};

View File

@ -23,6 +23,15 @@
stdout-path = "serial0:115200n8";
};
reserved-memory {
linux,cma {
compatible = "shared-dma-pool";
size = <0x0 0x8000000>;
reusable;
linux,cma-default;
};
};
vph_pwr: vph-pwr-regulator {
compatible = "regulator-fixed";

View File

@ -2737,15 +2737,17 @@
device_type = "pci";
compatible = "qcom,pcie-x1e80100";
reg = <0 0x01bf8000 0 0x3000>,
<0 0x70000000 0 0xf1d>,
<0 0x70000f20 0 0xa8>,
<0 0x70000000 0 0xf20>,
<0 0x70000f40 0 0xa8>,
<0 0x70001000 0 0x1000>,
<0 0x70100000 0 0x100000>;
<0 0x70100000 0 0x100000>,
<0 0x01bfb000 0 0x1000>;
reg-names = "parf",
"dbi",
"elbi",
"atu",
"config";
"config",
"mhi";
#address-cells = <3>;
#size-cells = <2>;
ranges = <0x01000000 0 0x00000000 0 0x70200000 0 0x100000>,

View File

@ -1036,6 +1036,7 @@ CONFIG_SND_AUDIO_GRAPH_CARD2=m
CONFIG_HID_MULTITOUCH=m
CONFIG_I2C_HID_ACPI=m
CONFIG_I2C_HID_OF=m
CONFIG_I2C_HID_OF_ELAN=m
CONFIG_USB=y
CONFIG_USB_OTG=y
CONFIG_USB_XHCI_HCD=y

View File

@ -348,11 +348,15 @@ static void pmic_glink_remove(struct platform_device *pdev)
mutex_unlock(&__pmic_glink_lock);
}
static const unsigned long pmic_glink_sc8280xp_client_mask = BIT(PMIC_GLINK_CLIENT_BATT) |
BIT(PMIC_GLINK_CLIENT_ALTMODE);
static const unsigned long pmic_glink_sm8450_client_mask = BIT(PMIC_GLINK_CLIENT_BATT) |
BIT(PMIC_GLINK_CLIENT_ALTMODE) |
BIT(PMIC_GLINK_CLIENT_UCSI);
static const struct of_device_id pmic_glink_of_match[] = {
{ .compatible = "qcom,sc8280xp-pmic-glink", .data = &pmic_glink_sc8280xp_client_mask },
{ .compatible = "qcom,pmic-glink", .data = &pmic_glink_sm8450_client_mask },
{}
};