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KVM: SVM: relax conditions for allowing MSR_IA32_SPEC_CTRL accesses
Userspace that does not know about the AMD_IBRS bit might still allow the guest to protect itself with MSR_IA32_SPEC_CTRL using the Intel SPEC_CTRL bit. However, svm.c disallows this and will cause a #GP in the guest when writing to the MSR. Fix this by loosening the test and allowing the Intel CPUID bit, and in fact allow the AMD_STIBP bit as well since it allows writing to MSR_IA32_SPEC_CTRL too. Reported-by: Zhiyi Guo <zhguo@redhat.com> Analyzed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Analyzed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -4225,6 +4225,8 @@ static int svm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
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break;
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case MSR_IA32_SPEC_CTRL:
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if (!msr_info->host_initiated &&
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!guest_cpuid_has(vcpu, X86_FEATURE_SPEC_CTRL) &&
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!guest_cpuid_has(vcpu, X86_FEATURE_AMD_STIBP) &&
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!guest_cpuid_has(vcpu, X86_FEATURE_AMD_IBRS) &&
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!guest_cpuid_has(vcpu, X86_FEATURE_AMD_SSBD))
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return 1;
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@ -4310,6 +4312,8 @@ static int svm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
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break;
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case MSR_IA32_SPEC_CTRL:
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if (!msr->host_initiated &&
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!guest_cpuid_has(vcpu, X86_FEATURE_SPEC_CTRL) &&
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!guest_cpuid_has(vcpu, X86_FEATURE_AMD_STIBP) &&
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!guest_cpuid_has(vcpu, X86_FEATURE_AMD_IBRS) &&
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!guest_cpuid_has(vcpu, X86_FEATURE_AMD_SSBD))
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return 1;
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