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dt-bindings: phy: Move the Cadence D-PHY bindings
The Cadence D-PHY bindings was defined as part of the DSI block so far. However, since it's now going to be a separate driver, we need to move the binding to a file of its own. Acked-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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@ -31,28 +31,7 @@ Required subnodes:
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- one subnode per DSI device connected on the DSI bus. Each DSI device should
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contain a reg property encoding its virtual channel.
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Cadence DPHY
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============
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Cadence DPHY block.
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Required properties:
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- compatible: should be set to "cdns,dphy".
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- reg: physical base address and length of the DPHY registers.
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- clocks: DPHY reference clocks.
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- clock-names: must contain "psm" and "pll_ref".
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- #phy-cells: must be set to 0.
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Example:
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dphy0: dphy@fd0e0000{
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compatible = "cdns,dphy";
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reg = <0x0 0xfd0e0000 0x0 0x1000>;
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clocks = <&psm_clk>, <&pll_ref_clk>;
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clock-names = "psm", "pll_ref";
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#phy-cells = <0>;
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};
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dsi0: dsi@fd0c0000 {
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compatible = "cdns,dsi";
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reg = <0x0 0xfd0c0000 0x0 0x1000>;
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20
Documentation/devicetree/bindings/phy/cdns,dphy.txt
Normal file
20
Documentation/devicetree/bindings/phy/cdns,dphy.txt
Normal file
@ -0,0 +1,20 @@
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Cadence DPHY
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============
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Cadence DPHY block.
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Required properties:
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- compatible: should be set to "cdns,dphy".
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- reg: physical base address and length of the DPHY registers.
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- clocks: DPHY reference clocks.
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- clock-names: must contain "psm" and "pll_ref".
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- #phy-cells: must be set to 0.
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Example:
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dphy0: dphy@fd0e0000{
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compatible = "cdns,dphy";
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reg = <0x0 0xfd0e0000 0x0 0x1000>;
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clocks = <&psm_clk>, <&pll_ref_clk>;
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clock-names = "psm", "pll_ref";
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#phy-cells = <0>;
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};
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