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pwm: jz4740: Make disable operation compatible with TCU2 mode

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On the JZ4750 and later SoCs, channel 1 and 2 operate in a different
way (TCU2 mode) as the other channels. If a TCU2 mode counter is
stopped before its PWM functionality is disabled, the output is not
guaranteed to return to the initial level.

Signed-off-by: Maarten ter Huurne <maarten@treewalker.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
This commit is contained in:
Maarten ter Huurne 2018-01-06 17:58:40 +01:00 committed by Thierry Reding
parent 1f6eefeb7c
commit df56b1712d
1 changed files with 7 additions and 1 deletions
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8
drivers/pwm/pwm-jz4740.c
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@ -71,9 +71,15 @@ static void jz4740_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
{
uint32_t ctrl = jz4740_timer_get_ctrl(pwm->hwpwm);
/* Disable PWM output.
* In TCU2 mode (channel 1/2 on JZ4750+), this must be done before the
* counter is stopped, while in TCU1 mode the order does not matter.
*/
ctrl &= ~JZ_TIMER_CTRL_PWM_ENABLE;
jz4740_timer_disable(pwm->hwpwm);
jz4740_timer_set_ctrl(pwm->hwpwm, ctrl);
/* Stop counter */
jz4740_timer_disable(pwm->hwpwm);
}
static int jz4740_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,