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sh-pfc: Consolidate pin definition macros
Move the pin definition macros to a common header file. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
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@ -1266,19 +1266,12 @@ static const u16 pinmux_data[] = {
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PINMUX_DATA(IRQ57_MARK, PORT329_FN0),
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};
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#define R8A73A4_PIN(pin, cfgs) \
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{ \
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.name = __stringify(PORT##pin), \
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.enum_id = PORT##pin##_DATA, \
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.configs = cfgs, \
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}
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#define __O (SH_PFC_PIN_CFG_OUTPUT)
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#define __IO (SH_PFC_PIN_CFG_INPUT | SH_PFC_PIN_CFG_OUTPUT)
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#define __PUD (SH_PFC_PIN_CFG_PULL_DOWN | SH_PFC_PIN_CFG_PULL_UP)
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#define R8A73A4_PIN_IO_PU_PD(pin) R8A73A4_PIN(pin, __IO | __PUD)
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#define R8A73A4_PIN_O(pin) R8A73A4_PIN(pin, __O)
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#define R8A73A4_PIN_IO_PU_PD(pin) SH_PFC_PIN_CFG(pin, __IO | __PUD)
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#define R8A73A4_PIN_O(pin) SH_PFC_PIN_CFG(pin, __O)
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static struct sh_pfc_pin pinmux_pins[] = {
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R8A73A4_PIN_IO_PU_PD(0), R8A73A4_PIN_IO_PU_PD(1),
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@ -1527,13 +1527,6 @@ static const u16 pinmux_data[] = {
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PINMUX_DATA(TRACEAUD_FROM_MEMC_MARK, MSEL5CR_30_1, MSEL5CR_29_0),
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};
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#define R8A7740_PIN(pin, cfgs) \
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{ \
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.name = __stringify(PORT##pin), \
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.enum_id = PORT##pin##_DATA, \
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.configs = cfgs, \
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}
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#define __I (SH_PFC_PIN_CFG_INPUT)
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#define __O (SH_PFC_PIN_CFG_OUTPUT)
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#define __IO (SH_PFC_PIN_CFG_INPUT | SH_PFC_PIN_CFG_OUTPUT)
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@ -1541,15 +1534,15 @@ static const u16 pinmux_data[] = {
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#define __PU (SH_PFC_PIN_CFG_PULL_UP)
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#define __PUD (SH_PFC_PIN_CFG_PULL_DOWN | SH_PFC_PIN_CFG_PULL_UP)
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#define R8A7740_PIN_I_PD(pin) R8A7740_PIN(pin, __I | __PD)
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#define R8A7740_PIN_I_PU(pin) R8A7740_PIN(pin, __I | __PU)
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#define R8A7740_PIN_I_PU_PD(pin) R8A7740_PIN(pin, __I | __PUD)
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#define R8A7740_PIN_IO(pin) R8A7740_PIN(pin, __IO)
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#define R8A7740_PIN_IO_PD(pin) R8A7740_PIN(pin, __IO | __PD)
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#define R8A7740_PIN_IO_PU(pin) R8A7740_PIN(pin, __IO | __PU)
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#define R8A7740_PIN_IO_PU_PD(pin) R8A7740_PIN(pin, __IO | __PUD)
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#define R8A7740_PIN_O(pin) R8A7740_PIN(pin, __O)
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#define R8A7740_PIN_O_PU_PD(pin) R8A7740_PIN(pin, __O | __PUD)
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#define R8A7740_PIN_I_PD(pin) SH_PFC_PIN_CFG(pin, __I | __PD)
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#define R8A7740_PIN_I_PU(pin) SH_PFC_PIN_CFG(pin, __I | __PU)
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#define R8A7740_PIN_I_PU_PD(pin) SH_PFC_PIN_CFG(pin, __I | __PUD)
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#define R8A7740_PIN_IO(pin) SH_PFC_PIN_CFG(pin, __IO)
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#define R8A7740_PIN_IO_PD(pin) SH_PFC_PIN_CFG(pin, __IO | __PD)
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#define R8A7740_PIN_IO_PU(pin) SH_PFC_PIN_CFG(pin, __IO | __PU)
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#define R8A7740_PIN_IO_PU_PD(pin) SH_PFC_PIN_CFG(pin, __IO | __PUD)
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#define R8A7740_PIN_O(pin) SH_PFC_PIN_CFG(pin, __O)
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#define R8A7740_PIN_O_PU_PD(pin) SH_PFC_PIN_CFG(pin, __O | __PUD)
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static struct sh_pfc_pin pinmux_pins[] = {
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/* Table 56-1 (I/O and Pull U/D) */
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@ -829,13 +829,6 @@ static const u16 pinmux_data[] = {
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PINMUX_DATA(MFIv4_MARK, MSEL4CR_6_1),
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};
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#define SH7372_PIN(pin, cfgs) \
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{ \
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.name = __stringify(PORT##pin), \
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.enum_id = PORT##pin##_DATA, \
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.configs = cfgs, \
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}
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#define __I (SH_PFC_PIN_CFG_INPUT)
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#define __O (SH_PFC_PIN_CFG_OUTPUT)
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#define __IO (SH_PFC_PIN_CFG_INPUT | SH_PFC_PIN_CFG_OUTPUT)
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@ -843,15 +836,15 @@ static const u16 pinmux_data[] = {
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#define __PU (SH_PFC_PIN_CFG_PULL_UP)
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#define __PUD (SH_PFC_PIN_CFG_PULL_DOWN | SH_PFC_PIN_CFG_PULL_UP)
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#define SH7372_PIN_I_PD(pin) SH7372_PIN(pin, __I | __PD)
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#define SH7372_PIN_I_PU(pin) SH7372_PIN(pin, __I | __PU)
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#define SH7372_PIN_I_PU_PD(pin) SH7372_PIN(pin, __I | __PUD)
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#define SH7372_PIN_IO(pin) SH7372_PIN(pin, __IO)
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#define SH7372_PIN_IO_PD(pin) SH7372_PIN(pin, __IO | __PD)
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#define SH7372_PIN_IO_PU(pin) SH7372_PIN(pin, __IO | __PU)
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#define SH7372_PIN_IO_PU_PD(pin) SH7372_PIN(pin, __IO | __PUD)
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#define SH7372_PIN_O(pin) SH7372_PIN(pin, __O)
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#define SH7372_PIN_O_PU_PD(pin) SH7372_PIN(pin, __O | __PUD)
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#define SH7372_PIN_I_PD(pin) SH_PFC_PIN_CFG(pin, __I | __PD)
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#define SH7372_PIN_I_PU(pin) SH_PFC_PIN_CFG(pin, __I | __PU)
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#define SH7372_PIN_I_PU_PD(pin) SH_PFC_PIN_CFG(pin, __I | __PUD)
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#define SH7372_PIN_IO(pin) SH_PFC_PIN_CFG(pin, __IO)
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#define SH7372_PIN_IO_PD(pin) SH_PFC_PIN_CFG(pin, __IO | __PD)
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#define SH7372_PIN_IO_PU(pin) SH_PFC_PIN_CFG(pin, __IO | __PU)
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#define SH7372_PIN_IO_PU_PD(pin) SH_PFC_PIN_CFG(pin, __IO | __PUD)
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#define SH7372_PIN_O(pin) SH_PFC_PIN_CFG(pin, __O)
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#define SH7372_PIN_O_PU_PD(pin) SH_PFC_PIN_CFG(pin, __O | __PUD)
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static struct sh_pfc_pin pinmux_pins[] = {
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/* Table 57-1 (I/O and Pull U/D) */
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@ -1157,13 +1157,6 @@ static const u16 pinmux_data[] = {
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PINMUX_DATA(EDBGREQ_PU_MARK, MSEL4CR_MSEL1_1),
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};
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#define SH73A0_PIN(pin, cfgs) \
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{ \
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.name = __stringify(PORT##pin), \
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.enum_id = PORT##pin##_DATA, \
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.configs = cfgs, \
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}
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#define __I (SH_PFC_PIN_CFG_INPUT)
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#define __O (SH_PFC_PIN_CFG_OUTPUT)
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#define __IO (SH_PFC_PIN_CFG_INPUT | SH_PFC_PIN_CFG_OUTPUT)
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@ -1171,14 +1164,14 @@ static const u16 pinmux_data[] = {
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#define __PU (SH_PFC_PIN_CFG_PULL_UP)
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#define __PUD (SH_PFC_PIN_CFG_PULL_DOWN | SH_PFC_PIN_CFG_PULL_UP)
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#define SH73A0_PIN_I_PD(pin) SH73A0_PIN(pin, __I | __PD)
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#define SH73A0_PIN_I_PU(pin) SH73A0_PIN(pin, __I | __PU)
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#define SH73A0_PIN_I_PU_PD(pin) SH73A0_PIN(pin, __I | __PUD)
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#define SH73A0_PIN_IO(pin) SH73A0_PIN(pin, __IO)
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#define SH73A0_PIN_IO_PD(pin) SH73A0_PIN(pin, __IO | __PD)
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#define SH73A0_PIN_IO_PU(pin) SH73A0_PIN(pin, __IO | __PU)
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#define SH73A0_PIN_IO_PU_PD(pin) SH73A0_PIN(pin, __IO | __PUD)
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#define SH73A0_PIN_O(pin) SH73A0_PIN(pin, __O)
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#define SH73A0_PIN_I_PD(pin) SH_PFC_PIN_CFG(pin, __I | __PD)
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#define SH73A0_PIN_I_PU(pin) SH_PFC_PIN_CFG(pin, __I | __PU)
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#define SH73A0_PIN_I_PU_PD(pin) SH_PFC_PIN_CFG(pin, __I | __PUD)
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#define SH73A0_PIN_IO(pin) SH_PFC_PIN_CFG(pin, __IO)
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#define SH73A0_PIN_IO_PD(pin) SH_PFC_PIN_CFG(pin, __IO | __PD)
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#define SH73A0_PIN_IO_PU(pin) SH_PFC_PIN_CFG(pin, __IO | __PU)
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#define SH73A0_PIN_IO_PU_PD(pin) SH_PFC_PIN_CFG(pin, __IO | __PUD)
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#define SH73A0_PIN_O(pin) SH_PFC_PIN_CFG(pin, __O)
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static struct sh_pfc_pin pinmux_pins[] = {
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/* Table 25-1 (I/O and Pull U/D) */
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@ -273,6 +273,14 @@ struct sh_pfc_soc_info {
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.enum_id = data_or_mark, \
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}
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/* SH_PFC_PIN_CFG - Expand to a sh_pfc_pin entry (named PORT#) with config */
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#define SH_PFC_PIN_CFG(pin, cfgs) \
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{ \
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.name = __stringify(PORT##pin), \
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.enum_id = PORT##pin##_DATA, \
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.configs = cfgs, \
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}
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/* PINMUX_DATA_ALL - Expand to a list of PORT_name_DATA, PORT_name_FN0,
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* PORT_name_OUT, PORT_name_IN marks
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*/
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