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pinctrl: exynos: Handle only unmasked wakeup interrupts
A bit in EINTxx_PEND register is set regardless of interrupt mask, which causes spurious interrupts. To avoid them, the read value of pending register must be masked with current interrupt mask manually. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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@ -395,12 +395,15 @@ static void exynos_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc)
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struct exynos_weint_data *eintd = irq_get_handler_data(irq);
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struct exynos_weint_data *eintd = irq_get_handler_data(irq);
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struct samsung_pinctrl_drv_data *d = eintd->domain->host_data;
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struct samsung_pinctrl_drv_data *d = eintd->domain->host_data;
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unsigned long pend;
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unsigned long pend;
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unsigned long mask;
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chained_irq_enter(chip, desc);
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chained_irq_enter(chip, desc);
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pend = readl(d->virt_base + d->ctrl->weint_pend + 0x8);
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pend = readl(d->virt_base + d->ctrl->weint_pend + 0x8);
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exynos_irq_demux_eint(16, pend, eintd->domain);
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mask = readl(d->virt_base + d->ctrl->weint_mask + 0x8);
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exynos_irq_demux_eint(16, pend & ~mask, eintd->domain);
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pend = readl(d->virt_base + d->ctrl->weint_pend + 0xC);
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pend = readl(d->virt_base + d->ctrl->weint_pend + 0xC);
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exynos_irq_demux_eint(24, pend, eintd->domain);
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mask = readl(d->virt_base + d->ctrl->weint_mask + 0xC);
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exynos_irq_demux_eint(24, pend & ~mask, eintd->domain);
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chained_irq_exit(chip, desc);
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chained_irq_exit(chip, desc);
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}
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}
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