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Merge branch 'v3.14-next/fixes-samsung-2' into v3.14-next/dt-exynos-2
This commit is contained in:
commit
de4cf2fe36
@ -313,7 +313,7 @@
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display-timings {
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native-mode = <&timing0>;
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timing0: timing {
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clock-frequency = <50000>;
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clock-frequency = <47500000>;
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hactive = <1024>;
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vactive = <600>;
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hfront-porch = <64>;
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@ -38,9 +38,7 @@
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};
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};
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mshc@12550000 {
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#address-cells = <1>;
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#size-cells = <0>;
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mmc@12550000 {
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pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
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pinctrl-names = "default";
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vmmc-supply = <&ldo20_reg &buck8_reg>;
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@ -49,7 +47,6 @@
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num-slots = <1>;
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supports-highspeed;
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broken-cd;
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fifo-depth = <0x80>;
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card-detect-delay = <200>;
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samsung,dw-mshc-ciu-div = <3>;
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samsung,dw-mshc-sdr-timing = <2 3>;
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@ -122,9 +122,7 @@
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status = "okay";
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};
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mshc@12550000 {
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#address-cells = <1>;
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#size-cells = <0>;
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mmc@12550000 {
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pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
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pinctrl-names = "default";
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status = "okay";
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@ -132,7 +130,6 @@
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num-slots = <1>;
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supports-highspeed;
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broken-cd;
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fifo-depth = <0x80>;
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card-detect-delay = <200>;
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samsung,dw-mshc-ciu-div = <3>;
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samsung,dw-mshc-sdr-timing = <2 3>;
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@ -159,7 +156,7 @@
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display-timings {
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native-mode = <&timing0>;
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timing0: timing {
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clock-frequency = <50000>;
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clock-frequency = <47500000>;
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hactive = <1024>;
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vactive = <600>;
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hfront-porch = <64>;
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@ -442,13 +442,25 @@
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};
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};
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sdhci@12510000 {
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bus-width = <8>;
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mmc@12550000 {
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num-slots = <1>;
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supports-highspeed;
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broken-cd;
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non-removable;
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pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus8>;
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pinctrl-names = "default";
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card-detect-delay = <200>;
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vmmc-supply = <&vemmc_reg>;
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clock-frequency = <400000000>;
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samsung,dw-mshc-ciu-div = <0>;
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samsung,dw-mshc-sdr-timing = <2 3>;
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samsung,dw-mshc-ddr-timing = <1 2>;
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pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
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pinctrl-names = "default";
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status = "okay";
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slot@0 {
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reg = <0>;
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bus-width = <8>;
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};
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};
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serial@13800000 {
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@ -61,11 +61,4 @@
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};
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};
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mshc@12550000 {
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compatible = "samsung,exynos4412-dw-mshc";
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reg = <0x12550000 0x1000>;
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interrupts = <0 77 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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};
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@ -28,6 +28,7 @@
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pinctrl3 = &pinctrl_3;
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fimc-lite0 = &fimc_lite_0;
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fimc-lite1 = &fimc_lite_1;
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mshc0 = &mshc_0;
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};
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pd_isp: isp-power-domain@10023CA0 {
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@ -176,4 +177,16 @@
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};
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};
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};
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mshc_0: mmc@12550000 {
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compatible = "samsung,exynos4412-dw-mshc";
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reg = <0x12550000 0x1000>;
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interrupts = <0 77 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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fifo-depth = <0x80>;
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clocks = <&clock 301>, <&clock 149>;
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clock-names = "biu", "ciu";
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status = "disabled";
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};
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};
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@ -302,11 +302,13 @@
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buck7_reg: BUCK7 {
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regulator-name = "PVDD_BUCK7";
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regulator-always-on;
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op_mode = <1>;
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};
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buck8_reg: BUCK8 {
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regulator-name = "PVDD_BUCK8";
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regulator-always-on;
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op_mode = <1>;
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};
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buck9_reg: BUCK9 {
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@ -85,7 +85,7 @@
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keypad,num-rows = <8>;
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keypad,num-columns = <13>;
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google,needs-ghost-filter;
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linux,keymap = <0x0001003a /* CAPSLK */
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linux,keymap = <0x0001007d /* L_META */
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0x0002003b /* F1 */
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0x00030030 /* B */
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0x00040044 /* F10 */
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@ -130,6 +130,7 @@
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0x04060024 /* J */
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0x04080027 /* ; */
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0x04090026 /* L */
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0x040a002b /* \ */
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0x040b001c /* ENTER */
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0x0501002c /* Z */
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@ -60,11 +60,13 @@
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device_type = "cpu";
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compatible = "arm,cortex-a15";
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reg = <0>;
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clock-frequency = <1700000000>;
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};
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cpu@1 {
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device_type = "cpu";
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compatible = "arm,cortex-a15";
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reg = <1>;
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clock-frequency = <1700000000>;
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};
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};
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@ -64,7 +64,7 @@
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samsung,pins = "gpx0-7";
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samsung,pin-function = <3>;
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samsung,pin-pud = <0>;
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samaung,pin-drv = <0>;
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samsung,pin-drv = <0>;
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};
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};
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@ -36,7 +36,9 @@
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#include <plat/devs.h>
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#include <plat/fb.h>
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#include <linux/platform_data/mtd-nand-s3c2410.h>
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#include <linux/platform_data/mmc-sdhci-s3c.h>
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#include <plat/regs-serial.h>
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#include <plat/sdhci.h>
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#include <linux/platform_data/touchscreen-s3c2410.h>
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#include <video/platform_lcd.h>
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@ -214,6 +216,13 @@ static struct platform_device mini6410_lcd_powerdev = {
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.dev.platform_data = &mini6410_lcd_power_data,
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};
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static struct s3c_sdhci_platdata mini6410_hsmmc1_pdata = {
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.max_width = 4,
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.cd_type = S3C_SDHCI_CD_GPIO,
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.ext_cd_gpio = S3C64XX_GPN(10),
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.ext_cd_gpio_invert = true,
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};
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static struct platform_device *mini6410_devices[] __initdata = {
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&mini6410_device_eth,
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&s3c_device_hsmmc0,
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@ -321,6 +330,7 @@ static void __init mini6410_machine_init(void)
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s3c_nand_set_platdata(&mini6410_nand_info);
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s3c_fb_set_platdata(&mini6410_lcd_pdata[features.lcd_index]);
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s3c_sdhci1_set_platdata(&mini6410_hsmmc1_pdata);
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s3c24xx_ts_set_platdata(NULL);
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/* configure nCS1 width to 16 bits */
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@ -145,6 +145,8 @@ static inline void arch_enable_uart_fifo(void)
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if (!(fifocon & S3C2410_UFCON_RESETBOTH))
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break;
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}
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uart_wr(S3C2410_UFCON, S3C2410_UFCON_FIFOMODE);
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}
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}
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#else
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@ -530,7 +530,8 @@ static struct samsung_div_clock exynos4_div_clks[] __initdata = {
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DIV(sclk_i2s1, "sclk_i2s1", "sclk_audio1", DIV_PERIL5, 0, 6),
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DIV(sclk_i2s2, "sclk_i2s2", "sclk_audio2", DIV_PERIL5, 8, 6),
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DIV(none, "div_mmc4", "mout_mmc4", DIV_FSYS3, 0, 4),
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DIV(none, "div_mmc_pre4", "div_mmc4", DIV_FSYS3, 8, 8),
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DIV_F(none, "div_mmc_pre4", "div_mmc4", DIV_FSYS3, 8, 8,
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CLK_SET_RATE_PARENT, 0),
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DIV(none, "div_uart0", "mout_uart0", DIV_PERIL0, 0, 4),
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DIV(none, "div_uart1", "mout_uart1", DIV_PERIL0, 4, 4),
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DIV(none, "div_uart2", "mout_uart2", DIV_PERIL0, 8, 4),
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