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ARM: dts: imx7: Move nodes which have no reg property out of bus
Move usbphynop1, usbphynop2, usbhypnop3, replicator and timer and nodes from soc node to root node. The nodes that have been moved do not have any register properties and thus shouldn't be placed on the bus. This fixes the following build warnings with W=1: arch/arm/boot/dts/imx7d-cl-som-imx7.dtb: Warning (simple_bus_reg): Node /soc/replicator missing or empty reg/ranges property arch/arm/boot/dts/imx7d-cl-som-imx7.dtb: Warning (simple_bus_reg): Node /soc/timer missing or empty reg/ranges property arch/arm/boot/dts/imx7d-cl-som-imx7.dtb: Warning (simple_bus_reg): Node /soc/aips-bus@30800000/usbphynop1 missing or empty reg/ranges property arch/arm/boot/dts/imx7d-cl-som-imx7.dtb: Warning (simple_bus_reg): Node /soc/aips-bus@30800000/usbphynop3 missing or empty reg/ranges property arch/arm/boot/dts/imx7d-cl-som-imx7.dtb: Warning (simple_bus_reg): Node /soc/aips-bus@30800000/usbphynop2 missing or empty reg/ranges property Based on a patch from Simon Horman for r8a7795.dtsi. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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@ -63,6 +63,13 @@
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};
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};
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usbphynop2: usbphynop2 {
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compatible = "usb-nop-xceiv";
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clocks = <&clks IMX7D_USB_PHY2_CLK>;
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clock-names = "main_clk";
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#phy-cells = <0>;
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};
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soc {
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etm@3007d000 {
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compatible = "arm,coresight-etm3x", "arm,primecell";
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@ -105,13 +112,6 @@
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reg = <0x30b20200 0x200>;
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};
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usbphynop2: usbphynop2 {
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compatible = "usb-nop-xceiv";
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clocks = <&clks IMX7D_USB_PHY2_CLK>;
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clock-names = "main_clk";
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#phy-cells = <0>;
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};
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fec2: ethernet@30bf0000 {
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compatible = "fsl,imx7d-fec", "fsl,imx6sx-fec";
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reg = <0x30bf0000 0x10000>;
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@ -116,6 +116,66 @@
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clock-output-names = "osc";
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};
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usbphynop1: usbphynop1 {
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compatible = "usb-nop-xceiv";
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clocks = <&clks IMX7D_USB_PHY1_CLK>;
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clock-names = "main_clk";
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#phy-cells = <0>;
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};
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usbphynop3: usbphynop3 {
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compatible = "usb-nop-xceiv";
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clocks = <&clks IMX7D_USB_HSIC_ROOT_CLK>;
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clock-names = "main_clk";
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#phy-cells = <0>;
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};
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replicator {
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/*
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* non-configurable replicators don't show up on the
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* AMBA bus. As such no need to add "arm,primecell"
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*/
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compatible = "arm,coresight-replicator";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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/* replicator output ports */
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port@0 {
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reg = <0>;
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replicator_out_port0: endpoint {
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remote-endpoint = <&tpiu_in_port>;
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};
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};
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port@1 {
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reg = <1>;
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replicator_out_port1: endpoint {
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remote-endpoint = <&etr_in_port>;
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};
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};
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/* replicator input port */
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port@2 {
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reg = <0>;
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replicator_in_port0: endpoint {
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slave-mode;
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remote-endpoint = <&etf_out_port>;
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};
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};
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};
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};
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timer {
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compatible = "arm,armv7-timer";
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interrupt-parent = <&intc>;
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interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
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};
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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@ -260,43 +320,6 @@
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};
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};
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replicator {
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/*
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* non-configurable replicators don't show up on the
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* AMBA bus. As such no need to add "arm,primecell"
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*/
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compatible = "arm,coresight-replicator";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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/* replicator output ports */
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port@0 {
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reg = <0>;
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replicator_out_port0: endpoint {
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remote-endpoint = <&tpiu_in_port>;
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};
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};
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port@1 {
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reg = <1>;
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replicator_out_port1: endpoint {
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remote-endpoint = <&etr_in_port>;
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};
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};
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/* replicator input port */
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port@2 {
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reg = <0>;
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replicator_in_port0: endpoint {
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slave-mode;
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remote-endpoint = <&etf_out_port>;
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};
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};
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};
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};
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intc: interrupt-controller@31001000 {
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compatible = "arm,cortex-a7-gic";
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interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
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@ -309,15 +332,6 @@
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<0x31006000 0x2000>;
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};
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timer {
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compatible = "arm,armv7-timer";
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interrupt-parent = <&intc>;
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interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
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};
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aips1: aips-bus@30000000 {
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compatible = "fsl,aips-bus", "simple-bus";
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#address-cells = <1>;
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@ -945,20 +959,6 @@
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reg = <0x30b30200 0x200>;
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};
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usbphynop1: usbphynop1 {
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compatible = "usb-nop-xceiv";
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clocks = <&clks IMX7D_USB_PHY1_CLK>;
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clock-names = "main_clk";
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#phy-cells = <0>;
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};
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usbphynop3: usbphynop3 {
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compatible = "usb-nop-xceiv";
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clocks = <&clks IMX7D_USB_HSIC_ROOT_CLK>;
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clock-names = "main_clk";
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#phy-cells = <0>;
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};
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usdhc1: usdhc@30b40000 {
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compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc";
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reg = <0x30b40000 0x10000>;
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