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powerpc: remove old vector.S files
Update old kernel/Makefiles to cope Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
This commit is contained in:
Stephen Rothwell
parent
d1dead5c5f
commit
dcff1b170b
@ -38,6 +38,7 @@ endif
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# These are here while we do the architecture merge
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vecemu-y += ../../powerpc/kernel/vecemu.o
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vector-y += ../../powerpc/kernel/vector.o
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else
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obj-y := entry.o irq.o idle.o time.o misc.o \
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@ -1,217 +0,0 @@
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#include <asm/ppc_asm.h>
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#include <asm/processor.h>
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/*
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* The routines below are in assembler so we can closely control the
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* usage of floating-point registers. These routines must be called
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* with preempt disabled.
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*/
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.data
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fpzero:
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.long 0
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fpone:
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.long 0x3f800000 /* 1.0 in single-precision FP */
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fphalf:
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.long 0x3f000000 /* 0.5 in single-precision FP */
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.text
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/*
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* Internal routine to enable floating point and set FPSCR to 0.
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* Don't call it from C; it doesn't use the normal calling convention.
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*/
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fpenable:
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mfmsr r10
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ori r11,r10,MSR_FP
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mtmsr r11
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isync
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stfd fr0,24(r1)
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stfd fr1,16(r1)
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stfd fr31,8(r1)
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lis r11,fpzero@ha
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mffs fr31
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lfs fr1,fpzero@l(r11)
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mtfsf 0xff,fr1
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blr
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fpdisable:
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mtfsf 0xff,fr31
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lfd fr31,8(r1)
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lfd fr1,16(r1)
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lfd fr0,24(r1)
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mtmsr r10
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isync
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blr
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/*
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* Vector add, floating point.
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*/
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.globl vaddfp
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vaddfp:
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stwu r1,-32(r1)
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mflr r0
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stw r0,36(r1)
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bl fpenable
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li r0,4
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mtctr r0
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li r6,0
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1: lfsx fr0,r4,r6
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lfsx fr1,r5,r6
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fadds fr0,fr0,fr1
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stfsx fr0,r3,r6
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addi r6,r6,4
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bdnz 1b
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bl fpdisable
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lwz r0,36(r1)
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mtlr r0
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addi r1,r1,32
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blr
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/*
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* Vector subtract, floating point.
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*/
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.globl vsubfp
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vsubfp:
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stwu r1,-32(r1)
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mflr r0
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stw r0,36(r1)
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bl fpenable
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li r0,4
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mtctr r0
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li r6,0
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1: lfsx fr0,r4,r6
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lfsx fr1,r5,r6
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fsubs fr0,fr0,fr1
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stfsx fr0,r3,r6
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addi r6,r6,4
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bdnz 1b
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bl fpdisable
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lwz r0,36(r1)
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mtlr r0
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addi r1,r1,32
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blr
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/*
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* Vector multiply and add, floating point.
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*/
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.globl vmaddfp
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vmaddfp:
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stwu r1,-48(r1)
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mflr r0
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stw r0,52(r1)
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bl fpenable
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stfd fr2,32(r1)
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li r0,4
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mtctr r0
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li r7,0
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1: lfsx fr0,r4,r7
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lfsx fr1,r5,r7
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lfsx fr2,r6,r7
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fmadds fr0,fr0,fr2,fr1
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stfsx fr0,r3,r7
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addi r7,r7,4
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bdnz 1b
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lfd fr2,32(r1)
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bl fpdisable
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lwz r0,52(r1)
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mtlr r0
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addi r1,r1,48
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blr
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/*
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* Vector negative multiply and subtract, floating point.
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*/
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.globl vnmsubfp
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vnmsubfp:
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stwu r1,-48(r1)
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mflr r0
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stw r0,52(r1)
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bl fpenable
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stfd fr2,32(r1)
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li r0,4
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mtctr r0
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li r7,0
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1: lfsx fr0,r4,r7
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lfsx fr1,r5,r7
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lfsx fr2,r6,r7
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fnmsubs fr0,fr0,fr2,fr1
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stfsx fr0,r3,r7
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addi r7,r7,4
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bdnz 1b
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lfd fr2,32(r1)
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bl fpdisable
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lwz r0,52(r1)
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mtlr r0
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addi r1,r1,48
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blr
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/*
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* Vector reciprocal estimate. We just compute 1.0/x.
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* r3 -> destination, r4 -> source.
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*/
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.globl vrefp
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vrefp:
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stwu r1,-32(r1)
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mflr r0
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stw r0,36(r1)
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bl fpenable
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lis r9,fpone@ha
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li r0,4
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lfs fr1,fpone@l(r9)
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mtctr r0
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li r6,0
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1: lfsx fr0,r4,r6
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fdivs fr0,fr1,fr0
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stfsx fr0,r3,r6
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addi r6,r6,4
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bdnz 1b
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bl fpdisable
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lwz r0,36(r1)
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mtlr r0
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addi r1,r1,32
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blr
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/*
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* Vector reciprocal square-root estimate, floating point.
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* We use the frsqrte instruction for the initial estimate followed
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* by 2 iterations of Newton-Raphson to get sufficient accuracy.
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* r3 -> destination, r4 -> source.
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*/
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.globl vrsqrtefp
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vrsqrtefp:
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stwu r1,-48(r1)
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mflr r0
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stw r0,52(r1)
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bl fpenable
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stfd fr2,32(r1)
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stfd fr3,40(r1)
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stfd fr4,48(r1)
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stfd fr5,56(r1)
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lis r9,fpone@ha
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lis r8,fphalf@ha
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li r0,4
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lfs fr4,fpone@l(r9)
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lfs fr5,fphalf@l(r8)
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mtctr r0
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li r6,0
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1: lfsx fr0,r4,r6
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frsqrte fr1,fr0 /* r = frsqrte(s) */
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fmuls fr3,fr1,fr0 /* r * s */
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fmuls fr2,fr1,fr5 /* r * 0.5 */
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fnmsubs fr3,fr1,fr3,fr4 /* 1 - s * r * r */
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fmadds fr1,fr2,fr3,fr1 /* r = r + 0.5 * r * (1 - s * r * r) */
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fmuls fr3,fr1,fr0 /* r * s */
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fmuls fr2,fr1,fr5 /* r * 0.5 */
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fnmsubs fr3,fr1,fr3,fr4 /* 1 - s * r * r */
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fmadds fr1,fr2,fr3,fr1 /* r = r + 0.5 * r * (1 - s * r * r) */
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stfsx fr1,r3,r6
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addi r6,r6,4
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bdnz 1b
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lfd fr5,56(r1)
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lfd fr4,48(r1)
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lfd fr3,40(r1)
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lfd fr2,32(r1)
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bl fpdisable
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lwz r0,36(r1)
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mtlr r0
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addi r1,r1,32
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blr
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@ -76,3 +76,4 @@ endif
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# These are here while we do the architecture merge
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vecemu-y += ../../powerpc/kernel/vecemu.o
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vector-y += ../../powerpc/kernel/vector.o
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@ -1,172 +0,0 @@
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#include <asm/ppc_asm.h>
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#include <asm/processor.h>
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/*
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* The routines below are in assembler so we can closely control the
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* usage of floating-point registers. These routines must be called
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* with preempt disabled.
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*/
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.section ".toc","aw"
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fpzero:
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.tc FD_0_0[TC],0
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fpone:
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.tc FD_3ff00000_0[TC],0x3ff0000000000000 /* 1.0 */
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fphalf:
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.tc FD_3fe00000_0[TC],0x3fe0000000000000 /* 0.5 */
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.text
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/*
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* Internal routine to enable floating point and set FPSCR to 0.
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* Don't call it from C; it doesn't use the normal calling convention.
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*/
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fpenable:
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mfmsr r10
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ori r11,r10,MSR_FP
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mtmsr r11
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isync
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stfd fr31,-8(r1)
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stfd fr0,-16(r1)
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stfd fr1,-24(r1)
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mffs fr31
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lfd fr1,fpzero@toc(r2)
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mtfsf 0xff,fr1
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blr
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fpdisable:
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mtlr r12
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mtfsf 0xff,fr31
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lfd fr1,-24(r1)
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lfd fr0,-16(r1)
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lfd fr31,-8(r1)
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mtmsr r10
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isync
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blr
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/*
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* Vector add, floating point.
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*/
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_GLOBAL(vaddfp)
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mflr r12
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bl fpenable
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li r0,4
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mtctr r0
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li r6,0
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1: lfsx fr0,r4,r6
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lfsx fr1,r5,r6
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fadds fr0,fr0,fr1
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stfsx fr0,r3,r6
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addi r6,r6,4
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bdnz 1b
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b fpdisable
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/*
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* Vector subtract, floating point.
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*/
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_GLOBAL(vsubfp)
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mflr r12
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bl fpenable
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li r0,4
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mtctr r0
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li r6,0
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1: lfsx fr0,r4,r6
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lfsx fr1,r5,r6
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fsubs fr0,fr0,fr1
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stfsx fr0,r3,r6
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addi r6,r6,4
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bdnz 1b
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b fpdisable
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/*
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* Vector multiply and add, floating point.
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*/
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_GLOBAL(vmaddfp)
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mflr r12
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bl fpenable
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stfd fr2,-32(r1)
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li r0,4
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mtctr r0
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li r7,0
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1: lfsx fr0,r4,r7
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lfsx fr1,r5,r7
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lfsx fr2,r6,r7
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fmadds fr0,fr0,fr2,fr1
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stfsx fr0,r3,r7
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addi r7,r7,4
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bdnz 1b
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lfd fr2,-32(r1)
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b fpdisable
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/*
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* Vector negative multiply and subtract, floating point.
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*/
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_GLOBAL(vnmsubfp)
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mflr r12
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bl fpenable
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stfd fr2,-32(r1)
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li r0,4
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mtctr r0
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li r7,0
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1: lfsx fr0,r4,r7
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lfsx fr1,r5,r7
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lfsx fr2,r6,r7
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fnmsubs fr0,fr0,fr2,fr1
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stfsx fr0,r3,r7
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addi r7,r7,4
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bdnz 1b
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lfd fr2,-32(r1)
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b fpdisable
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/*
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* Vector reciprocal estimate. We just compute 1.0/x.
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* r3 -> destination, r4 -> source.
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*/
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_GLOBAL(vrefp)
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mflr r12
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bl fpenable
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li r0,4
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lfd fr1,fpone@toc(r2)
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mtctr r0
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li r6,0
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1: lfsx fr0,r4,r6
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fdivs fr0,fr1,fr0
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stfsx fr0,r3,r6
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addi r6,r6,4
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bdnz 1b
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b fpdisable
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/*
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* Vector reciprocal square-root estimate, floating point.
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* We use the frsqrte instruction for the initial estimate followed
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* by 2 iterations of Newton-Raphson to get sufficient accuracy.
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* r3 -> destination, r4 -> source.
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*/
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_GLOBAL(vrsqrtefp)
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mflr r12
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bl fpenable
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stfd fr2,-32(r1)
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stfd fr3,-40(r1)
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stfd fr4,-48(r1)
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stfd fr5,-56(r1)
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li r0,4
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lfd fr4,fpone@toc(r2)
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lfd fr5,fphalf@toc(r2)
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mtctr r0
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li r6,0
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1: lfsx fr0,r4,r6
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frsqrte fr1,fr0 /* r = frsqrte(s) */
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fmuls fr3,fr1,fr0 /* r * s */
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fmuls fr2,fr1,fr5 /* r * 0.5 */
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fnmsubs fr3,fr1,fr3,fr4 /* 1 - s * r * r */
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fmadds fr1,fr2,fr3,fr1 /* r = r + 0.5 * r * (1 - s * r * r) */
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fmuls fr3,fr1,fr0 /* r * s */
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fmuls fr2,fr1,fr5 /* r * 0.5 */
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fnmsubs fr3,fr1,fr3,fr4 /* 1 - s * r * r */
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fmadds fr1,fr2,fr3,fr1 /* r = r + 0.5 * r * (1 - s * r * r) */
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stfsx fr1,r3,r6
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addi r6,r6,4
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bdnz 1b
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lfd fr5,-56(r1)
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lfd fr4,-48(r1)
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lfd fr3,-40(r1)
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lfd fr2,-32(r1)
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b fpdisable
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Reference in New Issue
Block a user