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pinctrl: ocelot: Fix pincfg for lan966x
The blamed commit introduce support for lan966x which use the same
pinconf_ops as sparx5. The problem is that pinconf_ops is specific to
sparx5. More precisely the offset of the bits in the pincfg register are
different and also lan966x doesn't have support for
PIN_CONFIG_INPUT_SCHMITT_ENABLE.
Fix this by making pinconf_ops more generic such that it can be also
used by lan966x. This is done by introducing 'ocelot_pincfg_data' which
contains the offset and what is supported for each SOC.
Fixes: 531d6ab365
("pinctrl: ocelot: Extend support for lan966x")
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/20220713193750.4079621-2-horatiu.vultur@microchip.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
parent
a9ab5bf33c
commit
dc62db7138
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@ -29,19 +29,12 @@
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#define ocelot_clrsetbits(addr, clear, set) \
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writel((readl(addr) & ~(clear)) | (set), (addr))
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/* PINCONFIG bits (sparx5 only) */
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enum {
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PINCONF_BIAS,
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PINCONF_SCHMITT,
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PINCONF_DRIVE_STRENGTH,
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};
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#define BIAS_PD_BIT BIT(4)
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#define BIAS_PU_BIT BIT(3)
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#define BIAS_BITS (BIAS_PD_BIT|BIAS_PU_BIT)
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#define SCHMITT_BIT BIT(2)
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#define DRIVE_BITS GENMASK(1, 0)
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/* GPIO standard registers */
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#define OCELOT_GPIO_OUT_SET 0x0
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#define OCELOT_GPIO_OUT_CLR 0x4
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@ -321,6 +314,13 @@ struct ocelot_pin_caps {
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unsigned char a_functions[OCELOT_FUNC_PER_PIN]; /* Additional functions */
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};
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struct ocelot_pincfg_data {
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u8 pd_bit;
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u8 pu_bit;
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u8 drive_bits;
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u8 schmitt_bit;
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};
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struct ocelot_pinctrl {
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struct device *dev;
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struct pinctrl_dev *pctl;
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@ -328,10 +328,16 @@ struct ocelot_pinctrl {
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struct regmap *map;
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struct regmap *pincfg;
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struct pinctrl_desc *desc;
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const struct ocelot_pincfg_data *pincfg_data;
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struct ocelot_pmx_func func[FUNC_MAX];
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u8 stride;
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};
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struct ocelot_match_data {
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struct pinctrl_desc desc;
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struct ocelot_pincfg_data pincfg_data;
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};
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#define LUTON_P(p, f0, f1) \
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static struct ocelot_pin_caps luton_pin_##p = { \
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.pin = p, \
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@ -1325,6 +1331,7 @@ static int ocelot_hw_get_value(struct ocelot_pinctrl *info,
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int ret = -EOPNOTSUPP;
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if (info->pincfg) {
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const struct ocelot_pincfg_data *opd = info->pincfg_data;
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u32 regcfg;
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ret = regmap_read(info->pincfg, pin, ®cfg);
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@ -1334,15 +1341,15 @@ static int ocelot_hw_get_value(struct ocelot_pinctrl *info,
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ret = 0;
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switch (reg) {
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case PINCONF_BIAS:
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*val = regcfg & BIAS_BITS;
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*val = regcfg & (opd->pd_bit | opd->pu_bit);
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break;
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case PINCONF_SCHMITT:
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*val = regcfg & SCHMITT_BIT;
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*val = regcfg & opd->schmitt_bit;
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break;
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case PINCONF_DRIVE_STRENGTH:
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*val = regcfg & DRIVE_BITS;
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*val = regcfg & opd->drive_bits;
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break;
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default:
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@ -1379,23 +1386,27 @@ static int ocelot_hw_set_value(struct ocelot_pinctrl *info,
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int ret = -EOPNOTSUPP;
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if (info->pincfg) {
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const struct ocelot_pincfg_data *opd = info->pincfg_data;
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ret = 0;
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switch (reg) {
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case PINCONF_BIAS:
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ret = ocelot_pincfg_clrsetbits(info, pin, BIAS_BITS,
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ret = ocelot_pincfg_clrsetbits(info, pin,
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opd->pd_bit | opd->pu_bit,
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val);
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break;
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case PINCONF_SCHMITT:
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ret = ocelot_pincfg_clrsetbits(info, pin, SCHMITT_BIT,
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ret = ocelot_pincfg_clrsetbits(info, pin,
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opd->schmitt_bit,
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val);
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break;
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case PINCONF_DRIVE_STRENGTH:
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if (val <= 3)
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ret = ocelot_pincfg_clrsetbits(info, pin,
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DRIVE_BITS, val);
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opd->drive_bits,
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val);
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else
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ret = -EINVAL;
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break;
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@ -1425,17 +1436,20 @@ static int ocelot_pinconf_get(struct pinctrl_dev *pctldev,
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if (param == PIN_CONFIG_BIAS_DISABLE)
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val = (val == 0);
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else if (param == PIN_CONFIG_BIAS_PULL_DOWN)
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val = (val & BIAS_PD_BIT ? true : false);
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val = !!(val & info->pincfg_data->pd_bit);
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else /* PIN_CONFIG_BIAS_PULL_UP */
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val = (val & BIAS_PU_BIT ? true : false);
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val = !!(val & info->pincfg_data->pu_bit);
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break;
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case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
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if (!info->pincfg_data->schmitt_bit)
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return -EOPNOTSUPP;
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err = ocelot_hw_get_value(info, pin, PINCONF_SCHMITT, &val);
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if (err)
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return err;
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val = (val & SCHMITT_BIT ? true : false);
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val = !!(val & info->pincfg_data->schmitt_bit);
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break;
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case PIN_CONFIG_DRIVE_STRENGTH:
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@ -1479,6 +1493,7 @@ static int ocelot_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
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unsigned long *configs, unsigned int num_configs)
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{
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struct ocelot_pinctrl *info = pinctrl_dev_get_drvdata(pctldev);
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const struct ocelot_pincfg_data *opd = info->pincfg_data;
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u32 param, arg, p;
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int cfg, err = 0;
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@ -1491,8 +1506,8 @@ static int ocelot_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
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case PIN_CONFIG_BIAS_PULL_UP:
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case PIN_CONFIG_BIAS_PULL_DOWN:
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arg = (param == PIN_CONFIG_BIAS_DISABLE) ? 0 :
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(param == PIN_CONFIG_BIAS_PULL_UP) ? BIAS_PU_BIT :
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BIAS_PD_BIT;
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(param == PIN_CONFIG_BIAS_PULL_UP) ?
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opd->pu_bit : opd->pd_bit;
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err = ocelot_hw_set_value(info, pin, PINCONF_BIAS, arg);
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if (err)
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@ -1501,7 +1516,10 @@ static int ocelot_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
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break;
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case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
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arg = arg ? SCHMITT_BIT : 0;
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if (!opd->schmitt_bit)
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return -EOPNOTSUPP;
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arg = arg ? opd->schmitt_bit : 0;
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err = ocelot_hw_set_value(info, pin, PINCONF_SCHMITT,
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arg);
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if (err)
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@ -1562,69 +1580,94 @@ static const struct pinctrl_ops ocelot_pctl_ops = {
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.dt_free_map = pinconf_generic_dt_free_map,
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};
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static struct pinctrl_desc luton_desc = {
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.name = "luton-pinctrl",
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.pins = luton_pins,
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.npins = ARRAY_SIZE(luton_pins),
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.pctlops = &ocelot_pctl_ops,
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.pmxops = &ocelot_pmx_ops,
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.owner = THIS_MODULE,
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static struct ocelot_match_data luton_desc = {
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.desc = {
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.name = "luton-pinctrl",
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.pins = luton_pins,
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.npins = ARRAY_SIZE(luton_pins),
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.pctlops = &ocelot_pctl_ops,
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.pmxops = &ocelot_pmx_ops,
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.owner = THIS_MODULE,
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},
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};
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static struct pinctrl_desc serval_desc = {
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.name = "serval-pinctrl",
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.pins = serval_pins,
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.npins = ARRAY_SIZE(serval_pins),
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.pctlops = &ocelot_pctl_ops,
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.pmxops = &ocelot_pmx_ops,
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.owner = THIS_MODULE,
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static struct ocelot_match_data serval_desc = {
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.desc = {
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.name = "serval-pinctrl",
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.pins = serval_pins,
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.npins = ARRAY_SIZE(serval_pins),
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.pctlops = &ocelot_pctl_ops,
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.pmxops = &ocelot_pmx_ops,
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.owner = THIS_MODULE,
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},
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};
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static struct pinctrl_desc ocelot_desc = {
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.name = "ocelot-pinctrl",
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.pins = ocelot_pins,
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.npins = ARRAY_SIZE(ocelot_pins),
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.pctlops = &ocelot_pctl_ops,
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.pmxops = &ocelot_pmx_ops,
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.owner = THIS_MODULE,
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static struct ocelot_match_data ocelot_desc = {
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.desc = {
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.name = "ocelot-pinctrl",
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.pins = ocelot_pins,
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.npins = ARRAY_SIZE(ocelot_pins),
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.pctlops = &ocelot_pctl_ops,
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.pmxops = &ocelot_pmx_ops,
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.owner = THIS_MODULE,
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},
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};
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static struct pinctrl_desc jaguar2_desc = {
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.name = "jaguar2-pinctrl",
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.pins = jaguar2_pins,
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.npins = ARRAY_SIZE(jaguar2_pins),
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.pctlops = &ocelot_pctl_ops,
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.pmxops = &ocelot_pmx_ops,
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.owner = THIS_MODULE,
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static struct ocelot_match_data jaguar2_desc = {
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.desc = {
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.name = "jaguar2-pinctrl",
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.pins = jaguar2_pins,
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.npins = ARRAY_SIZE(jaguar2_pins),
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.pctlops = &ocelot_pctl_ops,
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.pmxops = &ocelot_pmx_ops,
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.owner = THIS_MODULE,
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},
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};
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static struct pinctrl_desc servalt_desc = {
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.name = "servalt-pinctrl",
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.pins = servalt_pins,
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.npins = ARRAY_SIZE(servalt_pins),
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.pctlops = &ocelot_pctl_ops,
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.pmxops = &ocelot_pmx_ops,
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.owner = THIS_MODULE,
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static struct ocelot_match_data servalt_desc = {
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.desc = {
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.name = "servalt-pinctrl",
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.pins = servalt_pins,
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.npins = ARRAY_SIZE(servalt_pins),
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.pctlops = &ocelot_pctl_ops,
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.pmxops = &ocelot_pmx_ops,
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.owner = THIS_MODULE,
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},
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};
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static struct pinctrl_desc sparx5_desc = {
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.name = "sparx5-pinctrl",
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.pins = sparx5_pins,
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.npins = ARRAY_SIZE(sparx5_pins),
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.pctlops = &ocelot_pctl_ops,
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.pmxops = &ocelot_pmx_ops,
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.confops = &ocelot_confops,
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.owner = THIS_MODULE,
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static struct ocelot_match_data sparx5_desc = {
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.desc = {
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.name = "sparx5-pinctrl",
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.pins = sparx5_pins,
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.npins = ARRAY_SIZE(sparx5_pins),
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.pctlops = &ocelot_pctl_ops,
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.pmxops = &ocelot_pmx_ops,
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.confops = &ocelot_confops,
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.owner = THIS_MODULE,
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},
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.pincfg_data = {
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.pd_bit = BIT(4),
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.pu_bit = BIT(3),
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.drive_bits = GENMASK(1, 0),
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.schmitt_bit = BIT(2),
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},
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};
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static struct pinctrl_desc lan966x_desc = {
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.name = "lan966x-pinctrl",
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.pins = lan966x_pins,
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.npins = ARRAY_SIZE(lan966x_pins),
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.pctlops = &ocelot_pctl_ops,
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.pmxops = &lan966x_pmx_ops,
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.confops = &ocelot_confops,
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.owner = THIS_MODULE,
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static struct ocelot_match_data lan966x_desc = {
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.desc = {
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.name = "lan966x-pinctrl",
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.pins = lan966x_pins,
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.npins = ARRAY_SIZE(lan966x_pins),
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.pctlops = &ocelot_pctl_ops,
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.pmxops = &lan966x_pmx_ops,
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.confops = &ocelot_confops,
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.owner = THIS_MODULE,
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},
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.pincfg_data = {
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.pd_bit = BIT(3),
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.pu_bit = BIT(2),
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.drive_bits = GENMASK(1, 0),
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},
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};
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static int ocelot_create_group_func_map(struct device *dev,
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static int ocelot_pinctrl_probe(struct platform_device *pdev)
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{
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const struct ocelot_match_data *data;
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struct device *dev = &pdev->dev;
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struct ocelot_pinctrl *info;
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struct reset_control *reset;
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if (!info)
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return -ENOMEM;
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info->desc = (struct pinctrl_desc *)device_get_match_data(dev);
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data = device_get_match_data(dev);
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if (!data)
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return -EINVAL;
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info->desc = devm_kmemdup(dev, &data->desc, sizeof(*info->desc),
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GFP_KERNEL);
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if (!info->desc)
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return -ENOMEM;
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info->pincfg_data = &data->pincfg_data;
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reset = devm_reset_control_get_optional_shared(dev, "switch");
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if (IS_ERR(reset))
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