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x86 ACPI: Add support for Always Running APIC timer
Add support for Always Running APIC timer, CPUID_0x6_EAX_Bit2. This bit means the APIC timer continues to run even when CPU is in deep C-states. The advantage is that we can use LAPIC timer on these CPUs always, and there is no need for "slow to read and program" external timers (HPET/PIT) and the timer broadcast logic and related code in C-state entry and exit. Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Acked-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Len Brown <len.brown@intel.com>
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@ -154,6 +154,7 @@
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* CPUID levels like 0x6, 0xA etc
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*/
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#define X86_FEATURE_IDA (7*32+ 0) /* Intel Dynamic Acceleration */
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#define X86_FEATURE_ARAT (7*32+ 1) /* Always Running APIC Timer */
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/* Virtualization flags: Linux defined */
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#define X86_FEATURE_TPR_SHADOW (8*32+ 0) /* Intel TPR Shadow */
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@ -431,6 +431,12 @@ static void __cpuinit setup_APIC_timer(void)
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{
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struct clock_event_device *levt = &__get_cpu_var(lapic_events);
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if (cpu_has(¤t_cpu_data, X86_FEATURE_ARAT)) {
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lapic_clockevent.features &= ~CLOCK_EVT_FEAT_C3STOP;
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/* Make LAPIC timer preferrable over percpu HPET */
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lapic_clockevent.rating = 150;
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}
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memcpy(levt, &lapic_clockevent, sizeof(*levt));
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levt->cpumask = cpumask_of(smp_processor_id());
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@ -31,6 +31,7 @@ void __cpuinit init_scattered_cpuid_features(struct cpuinfo_x86 *c)
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static const struct cpuid_bit __cpuinitconst cpuid_bits[] = {
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{ X86_FEATURE_IDA, CR_EAX, 1, 0x00000006 },
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{ X86_FEATURE_ARAT, CR_EAX, 2, 0x00000006 },
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{ 0, 0, 0, 0 }
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};
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@ -145,6 +145,9 @@ static void acpi_timer_check_state(int state, struct acpi_processor *pr,
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struct acpi_processor_power *pwr = &pr->power;
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u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2;
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if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT))
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return;
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/*
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* Check, if one of the previous states already marked the lapic
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* unstable
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