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Kbuild: don't add obj tree in additional includes
When building with separate object directories and driver specific Makefiles that add additional header include paths, Kbuild adjusts the gcc flags so that we include both the directory in the source tree and in the object tree. However, due to another bug I fixed earlier, this did not actually include the correct directory in the object tree, so we know that we only really need the source tree here. Also, including the object tree sometimes causes warnings about nonexisting directories when the include path only exists in the source. This changes the logic to only emit the -I argument for the srctree, not for objects. We still need both $(srctree)/$(src) and $(obj) though, so I'm adding them manually. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Michal Marek <mmarek@suse.com>
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@ -202,7 +202,7 @@ hdr-inst := -f $(srctree)/scripts/Makefile.headersinst obj
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# Prefix -I with $(srctree) if it is not an absolute path.
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# skip if -I has no parameter
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addtree = $(if $(patsubst -I%,%,$(1)), \
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$(if $(filter-out -I/% -I../%,$(1)),$(patsubst -I%,-I$(srctree)/%,$(1))) $(1))
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$(if $(filter-out -I/% -I./% -I../%,$(1)),$(patsubst -I%,-I$(srctree)/%,$(1)),$(1)))
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# Find all -I options and call addtree
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flags = $(foreach o,$($(1)),$(if $(filter -I%,$(o)),$(call addtree,$(o)),$(o)))
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@ -155,9 +155,10 @@ else
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# $(call addtree,-I$(obj)) locates .h files in srctree, from generated .c files
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# and locates generated .h files
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# FIXME: Replace both with specific CFLAGS* statements in the makefiles
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__c_flags = $(call addtree,-I$(obj)) $(call flags,_c_flags)
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__a_flags = $(call flags,_a_flags)
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__cpp_flags = $(call flags,_cpp_flags)
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__c_flags = $(if $(obj),-I$(srctree)/$(src) -I$(obj)) \
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$(call flags,_c_flags)
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__a_flags = $(call flags,_a_flags)
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__cpp_flags = $(call flags,_cpp_flags)
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endif
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c_flags = -Wp,-MD,$(depfile) $(NOSTDINC_FLAGS) $(LINUXINCLUDE) \
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