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ARM: dts: renesas: Fix pin controller node names

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According to Devicetree Specification v0.2 and later, Section "Generic
Names Recommendation", the node name for a pin controller device node
should be "pinctrl".

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200821112351.5518-1-geert+renesas@glider.be
This commit is contained in:
Geert Uytterhoeven 2020-08-21 13:23:51 +02:00
parent 63070d7c22
commit d9fd7ff595
19 changed files with 19 additions and 19 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/boot/dts/emev2.dtsi
View File

@ -195,7 +195,7 @@
clock-names = "sclk";
};
pfc: pin-controller@e0140200 {
pfc: pinctrl@e0140200 {
compatible = "renesas,pfc-emev2";
reg = <0xe0140200 0x100>;
};

2
arch/arm/boot/dts/r7s72100.dtsi
View File

@ -499,7 +499,7 @@
clock-output-names = "sdhi00", "sdhi01", "sdhi10", "sdhi11";
};
pinctrl: pin-controller@fcfe3000 {
pinctrl: pinctrl@fcfe3000 {
compatible = "renesas,r7s72100-ports";
reg = <0xfcfe3000 0x4230>;

2
arch/arm/boot/dts/r7s9210.dtsi
View File

@ -489,7 +489,7 @@
interrupt-map-mask = <7 0>;
};
pinctrl: pin-controller@fcffe000 {
pinctrl: pinctrl@fcffe000 {
compatible = "renesas,r7s9210-pinctrl";
reg = <0xfcffe000 0x1000>;

2
arch/arm/boot/dts/r8a73a4.dtsi
View File

@ -221,7 +221,7 @@
power-domains = <&pd_c4>;
};
pfc: pin-controller@e6050000 {
pfc: pinctrl@e6050000 {
compatible = "renesas,pfc-r8a73a4";
reg = <0 0xe6050000 0 0x9000>;
gpio-controller;

2
arch/arm/boot/dts/r8a7740.dtsi
View File

@ -311,7 +311,7 @@
status = "disabled";
};
pfc: pin-controller@e6050000 {
pfc: pinctrl@e6050000 {
compatible = "renesas,pfc-r8a7740";
reg = <0xe6050000 0x8000>,
<0xe605800c 0x20>;

2
arch/arm/boot/dts/r8a7742.dtsi
View File

@ -338,7 +338,7 @@
resets = <&cpg 907>;
};
pfc: pin-controller@e6060000 {
pfc: pinctrl@e6060000 {
compatible = "renesas,pfc-r8a7742";
reg = <0 0xe6060000 0 0x250>;
};

2
arch/arm/boot/dts/r8a7743.dtsi
View File

@ -265,7 +265,7 @@
resets = <&cpg 904>;
};
pfc: pin-controller@e6060000 {
pfc: pinctrl@e6060000 {
compatible = "renesas,pfc-r8a7743";
reg = <0 0xe6060000 0 0x250>;
};

2
arch/arm/boot/dts/r8a7744.dtsi
View File

@ -265,7 +265,7 @@
resets = <&cpg 904>;
};
pfc: pin-controller@e6060000 {
pfc: pinctrl@e6060000 {
compatible = "renesas,pfc-r8a7744";
reg = <0 0xe6060000 0 0x250>;
};

2
arch/arm/boot/dts/r8a7745.dtsi
View File

@ -230,7 +230,7 @@
resets = <&cpg 905>;
};
pfc: pin-controller@e6060000 {
pfc: pinctrl@e6060000 {
compatible = "renesas,pfc-r8a7745";
reg = <0 0xe6060000 0 0x11c>;
};

2
arch/arm/boot/dts/r8a77470.dtsi
View File

@ -187,7 +187,7 @@
resets = <&cpg 907>;
};
pfc: pin-controller@e6060000 {
pfc: pinctrl@e6060000 {
compatible = "renesas,pfc-r8a77470";
reg = <0 0xe6060000 0 0x118>;
};

2
arch/arm/boot/dts/r8a7778.dtsi
View File

@ -142,7 +142,7 @@
interrupt-controller;
};
pfc: pin-controller@fffc0000 {
pfc: pinctrl@fffc0000 {
compatible = "renesas,pfc-r8a7778";
reg = <0xfffc0000 0x118>;
};

2
arch/arm/boot/dts/r8a7779.dtsi
View File

@ -321,7 +321,7 @@
status = "disabled";
};
pfc: pin-controller@fffc0000 {
pfc: pinctrl@fffc0000 {
compatible = "renesas,pfc-r8a7779";
reg = <0xfffc0000 0x23c>;
};

2
arch/arm/boot/dts/r8a7790.dtsi
View File

@ -363,7 +363,7 @@
resets = <&cpg 907>;
};
pfc: pin-controller@e6060000 {
pfc: pinctrl@e6060000 {
compatible = "renesas,pfc-r8a7790";
reg = <0 0xe6060000 0 0x250>;
};

2
arch/arm/boot/dts/r8a7791.dtsi
View File

@ -286,7 +286,7 @@
resets = <&cpg 904>;
};
pfc: pin-controller@e6060000 {
pfc: pinctrl@e6060000 {
compatible = "renesas,pfc-r8a7791";
reg = <0 0xe6060000 0 0x250>;
};

2
arch/arm/boot/dts/r8a7792.dtsi
View File

@ -296,7 +296,7 @@
resets = <&cpg 913>;
};
pfc: pin-controller@e6060000 {
pfc: pinctrl@e6060000 {
compatible = "renesas,pfc-r8a7792";
reg = <0 0xe6060000 0 0x144>;
};

2
arch/arm/boot/dts/r8a7793.dtsi
View File

@ -271,7 +271,7 @@
resets = <&cpg 904>;
};
pfc: pin-controller@e6060000 {
pfc: pinctrl@e6060000 {
compatible = "renesas,pfc-r8a7793";
reg = <0 0xe6060000 0 0x250>;
};

2
arch/arm/boot/dts/r8a7794.dtsi
View File

@ -238,7 +238,7 @@
resets = <&cpg 905>;
};
pfc: pin-controller@e6060000 {
pfc: pinctrl@e6060000 {
compatible = "renesas,pfc-r8a7794";
reg = <0 0xe6060000 0 0x11c>;
};

2
arch/arm/boot/dts/r9a06g032.dtsi
View File

@ -165,7 +165,7 @@
status = "disabled";
};
pinctrl: pin-controller@40067000 {
pinctrl: pinctrl@40067000 {
compatible = "renesas,r9a06g032-pinctrl", "renesas,rzn1-pinctrl";
reg = <0x40067000 0x1000>, <0x51000000 0x480>;
clocks = <&sysctrl R9A06G032_HCLK_PINCONFIG>;

2
arch/arm/boot/dts/sh73a0.dtsi
View File

@ -448,7 +448,7 @@
status = "disabled";
};
pfc: pin-controller@e6050000 {
pfc: pinctrl@e6050000 {
compatible = "renesas,pfc-sh73a0";
reg = <0xe6050000 0x8000>,
<0xe605801c 0x1c>;