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ARM: S5P6442: Add IRQ support
This patch adds IRQ support for S5P6442. This patch adds interrupt register definitions, IRQ definitions for various interrupt sources and new VIC base for VIC2 in plat-s5p common irq code. Signed-off-by: Adityapratap Sharma <aditya.ps@samsung.com> Signed-off-by: Atul Dahiya <atul.dahiya@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
This commit is contained in:
Kukjin Kim
Ben Dooks
parent
b6f837575e
commit
d9f18a981b
86
arch/arm/mach-s5p6442/include/mach/irqs.h
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86
arch/arm/mach-s5p6442/include/mach/irqs.h
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@ -0,0 +1,86 @@
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/* linux/arch/arm/mach-s5p6442/include/mach/irqs.h
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*
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* Copyright (c) 2010 Samsung Electronics Co., Ltd.
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* http://www.samsung.com/
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*
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* S5P6442 - IRQ definitions
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_ARCH_IRQS_H
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#define __ASM_ARCH_IRQS_H __FILE__
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#include <plat/irqs.h>
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/* VIC0 */
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#define IRQ_EINT16_31 S5P_IRQ_VIC0(16)
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#define IRQ_BATF S5P_IRQ_VIC0(17)
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#define IRQ_MDMA S5P_IRQ_VIC0(18)
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#define IRQ_PDMA S5P_IRQ_VIC0(19)
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#define IRQ_TIMER0_VIC S5P_IRQ_VIC0(21)
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#define IRQ_TIMER1_VIC S5P_IRQ_VIC0(22)
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#define IRQ_TIMER2_VIC S5P_IRQ_VIC0(23)
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#define IRQ_TIMER3_VIC S5P_IRQ_VIC0(24)
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#define IRQ_TIMER4_VIC S5P_IRQ_VIC0(25)
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#define IRQ_SYSTIMER S5P_IRQ_VIC0(26)
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#define IRQ_WDT S5P_IRQ_VIC0(27)
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#define IRQ_RTC_ALARM S5P_IRQ_VIC0(28)
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#define IRQ_RTC_TIC S5P_IRQ_VIC0(29)
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#define IRQ_GPIOINT S5P_IRQ_VIC0(30)
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/* VIC1 */
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#define IRQ_nPMUIRQ S5P_IRQ_VIC1(0)
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#define IRQ_ONENAND S5P_IRQ_VIC1(7)
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#define IRQ_UART0 S5P_IRQ_VIC1(10)
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#define IRQ_UART1 S5P_IRQ_VIC1(11)
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#define IRQ_UART2 S5P_IRQ_VIC1(12)
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#define IRQ_SPI0 S5P_IRQ_VIC1(15)
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#define IRQ_IIC S5P_IRQ_VIC1(19)
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#define IRQ_IIC1 S5P_IRQ_VIC1(20)
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#define IRQ_IIC2 S5P_IRQ_VIC1(21)
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#define IRQ_OTG S5P_IRQ_VIC1(24)
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#define IRQ_MSM S5P_IRQ_VIC1(25)
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#define IRQ_HSMMC0 S5P_IRQ_VIC1(26)
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#define IRQ_HSMMC1 S5P_IRQ_VIC1(27)
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#define IRQ_HSMMC2 S5P_IRQ_VIC1(28)
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#define IRQ_COMMRX S5P_IRQ_VIC1(29)
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#define IRQ_COMMTX S5P_IRQ_VIC1(30)
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/* VIC2 */
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#define IRQ_LCD0 S5P_IRQ_VIC2(0)
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#define IRQ_LCD1 S5P_IRQ_VIC2(1)
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#define IRQ_LCD2 S5P_IRQ_VIC2(2)
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#define IRQ_LCD3 S5P_IRQ_VIC2(3)
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#define IRQ_ROTATOR S5P_IRQ_VIC2(4)
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#define IRQ_FIMC0 S5P_IRQ_VIC2(5)
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#define IRQ_FIMC1 S5P_IRQ_VIC2(6)
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#define IRQ_FIMC2 S5P_IRQ_VIC2(7)
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#define IRQ_JPEG S5P_IRQ_VIC2(8)
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#define IRQ_3D S5P_IRQ_VIC2(10)
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#define IRQ_Mixer S5P_IRQ_VIC2(11)
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#define IRQ_MFC S5P_IRQ_VIC2(14)
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#define IRQ_TVENC S5P_IRQ_VIC2(15)
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#define IRQ_I2S0 S5P_IRQ_VIC2(16)
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#define IRQ_I2S1 S5P_IRQ_VIC2(17)
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#define IRQ_RP S5P_IRQ_VIC2(19)
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#define IRQ_PCM0 S5P_IRQ_VIC2(20)
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#define IRQ_PCM1 S5P_IRQ_VIC2(21)
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#define IRQ_ADC S5P_IRQ_VIC2(23)
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#define IRQ_PENDN S5P_IRQ_VIC2(24)
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#define IRQ_KEYPAD S5P_IRQ_VIC2(25)
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#define IRQ_SSS_INT S5P_IRQ_VIC2(27)
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#define IRQ_SSS_HASH S5P_IRQ_VIC2(28)
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#define IRQ_VIC_END S5P_IRQ_VIC2(31)
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#define S5P_IRQ_EINT_BASE (IRQ_VIC_END + 1)
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#define IRQ_EINT(x) ((x) < 16 ? S5P_IRQ_VIC0(x) : \
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(S5P_IRQ_EINT_BASE + (x)-16))
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/* Set the default NR_IRQS */
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#define NR_IRQS (IRQ_EINT(31) + 1)
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#endif /* __ASM_ARCH_IRQS_H */
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19
arch/arm/mach-s5p6442/include/mach/regs-irq.h
Normal file
19
arch/arm/mach-s5p6442/include/mach/regs-irq.h
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@ -0,0 +1,19 @@
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/* linux/arch/arm/mach-s5p6442/include/mach/regs-irq.h
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*
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* Copyright (c) 2010 Samsung Electronics Co., Ltd.
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* http://www.samsung.com/
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*
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* S5P6442 - IRQ register definitions
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_ARCH_REGS_IRQ_H
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#define __ASM_ARCH_REGS_IRQ_H __FILE__
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#include <asm/hardware/vic.h>
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#include <mach/map.h>
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#endif /* __ASM_ARCH_REGS_IRQ_H */
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@ -28,11 +28,13 @@
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#define S5P_VIC0_BASE S5P_IRQ(0)
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#define S5P_VIC1_BASE S5P_IRQ(32)
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#define S5P_VIC2_BASE S5P_IRQ(64)
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#define VIC_BASE(x) (S5P_VIC0_BASE + ((x)*32))
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#define IRQ_VIC0_BASE S5P_VIC0_BASE
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#define IRQ_VIC1_BASE S5P_VIC1_BASE
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#define IRQ_VIC2_BASE S5P_VIC2_BASE
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/* UART interrupts, each UART has 4 intterupts per channel so
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* use the space between the ISA and S3C main interrupts. Note, these
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@ -73,6 +75,7 @@
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#define S5P_IRQ_VIC0(x) (S5P_VIC0_BASE + (x))
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#define S5P_IRQ_VIC1(x) (S5P_VIC1_BASE + (x))
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#define S5P_IRQ_VIC2(x) (S5P_VIC2_BASE + (x))
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#define S5P_TIMER_IRQ(x) S5P_IRQ(11 + (x))
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@ -45,11 +45,13 @@ static struct s3c_uart_irq uart_irqs[] = {
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.base_irq = IRQ_S5P_UART_BASE2,
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.parent_irq = IRQ_UART2,
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},
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#if CONFIG_SERIAL_SAMSUNG_UARTS > 3
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[3] = {
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.regs = S5P_VA_UART3,
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.base_irq = IRQ_S5P_UART_BASE3,
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.parent_irq = IRQ_UART3,
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},
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#endif
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};
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void __init s5p_init_irq(u32 *vic, u32 num_vic)
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