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RDMA/hns: Bugfix for atomic operation
The atomic operation not supported inline. Besides, the standard atomic operation only support a sge and the sge is placed in the wqe. Fix: 384f881("RDMA/hns: Add atomic support") Signed-off-by: Lijun Ou <oulijun@huawei.com> Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
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@ -467,18 +467,14 @@ static int hns_roce_v2_post_send(struct ib_qp *ibqp,
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rc_sq_wqe->rkey =
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cpu_to_le32(atomic_wr(wr)->rkey);
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rc_sq_wqe->va =
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cpu_to_le32(atomic_wr(wr)->remote_addr);
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wqe += sizeof(struct hns_roce_v2_wqe_data_seg);
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set_atomic_seg(wqe, atomic_wr(wr));
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cpu_to_le64(atomic_wr(wr)->remote_addr);
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break;
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case IB_WR_ATOMIC_FETCH_AND_ADD:
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hr_op = HNS_ROCE_V2_WQE_OP_ATOM_FETCH_AND_ADD;
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rc_sq_wqe->rkey =
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cpu_to_le32(atomic_wr(wr)->rkey);
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rc_sq_wqe->va =
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cpu_to_le32(atomic_wr(wr)->remote_addr);
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wqe += sizeof(struct hns_roce_v2_wqe_data_seg);
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set_atomic_seg(wqe, atomic_wr(wr));
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cpu_to_le64(atomic_wr(wr)->remote_addr);
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break;
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case IB_WR_MASKED_ATOMIC_CMP_AND_SWP:
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hr_op =
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@ -497,10 +493,25 @@ static int hns_roce_v2_post_send(struct ib_qp *ibqp,
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V2_RC_SEND_WQE_BYTE_4_OPCODE_M,
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V2_RC_SEND_WQE_BYTE_4_OPCODE_S, hr_op);
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ret = set_rwqe_data_seg(ibqp, wr, rc_sq_wqe, wqe,
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&sge_ind, bad_wr);
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if (ret)
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goto out;
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if (wr->opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
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wr->opcode == IB_WR_ATOMIC_FETCH_AND_ADD) {
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struct hns_roce_v2_wqe_data_seg *dseg;
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dseg = wqe;
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set_data_seg_v2(dseg, wr->sg_list);
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wqe += sizeof(struct hns_roce_v2_wqe_data_seg);
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set_atomic_seg(wqe, atomic_wr(wr));
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roce_set_field(rc_sq_wqe->byte_16,
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V2_RC_SEND_WQE_BYTE_16_SGE_NUM_M,
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V2_RC_SEND_WQE_BYTE_16_SGE_NUM_S,
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wr->num_sge);
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} else {
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ret = set_rwqe_data_seg(ibqp, wr, rc_sq_wqe,
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wqe, &sge_ind, bad_wr);
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if (ret)
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goto out;
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}
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ind++;
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} else {
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dev_err(dev, "Illegal qp_type(0x%x)\n", ibqp->qp_type);
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