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rtlwifi: rtl8192de: Updates from latest Reaktek driver - Part III
This patch incorporate the differences between the 06/20/2011 and 08/16/2011 Realtek releases of the rtl8192de driver. The changes include: 1. Update for new chip versions Signed-off-by: Chaoming Li <chaoming_li@realsil.com.cn> Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Chaoming Li
John W. Linville
parent
5c079d8848
commit
d83579e2a5
@ -122,59 +122,98 @@
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#define GET_C2H_CMD_FEEDBACK_CCX_SEQ(__pcmdfbhdr) \
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LE_BITS_TO_4BYTE(((__pcmdfbhdr) + 4), 20, 12)
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/*
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* 92D chip ver:
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* BIT8: IS 92D
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* BIT9: single phy
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* BIT10: C-cut
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* BIT11: D-cut
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*/
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/* Chip specific */
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#define CHIP_92C BIT(0)
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#define CHIP_92C_1T2R BIT(1)
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#define CHIP_8723 BIT(2) /* RTL8723 With BT feature */
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#define CHIP_8723_DRV_REV BIT(3) /* RTL8723 Driver Revised */
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#define NORMAL_CHIP BIT(4)
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#define CHIP_VENDOR_UMC BIT(5)
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#define CHIP_VENDOR_UMC_B_CUT BIT(6) /* Chip version for ECO */
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/* for 92D */
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#define CHIP_92D BIT(8)
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#define CHIP_92D_SINGLEPHY BIT(9)
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#define CHIP_92D_C_CUT BIT(10)
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#define CHIP_92D_D_CUT BIT(11)
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enum version_8192d {
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VERSION_TEST_CHIP_88C = 0x00,
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VERSION_TEST_CHIP_92C = 0x01,
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VERSION_NORMAL_TSMC_CHIP_88C = 0x10,
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VERSION_NORMAL_TSMC_CHIP_92C = 0x11,
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VERSION_NORMAL_TSMC_CHIP_92C_1T2R = 0x13,
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VERSION_NORMAL_UMC_CHIP_88C_A_CUT = 0x30,
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VERSION_NORMAL_UMC_CHIP_92C_A_CUT = 0x31,
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VERSION_NORMAL_UMC_CHIP_92C_1T2R_A_CUT = 0x33,
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VERSION_NORMA_UMC_CHIP_8723_1T1R_A_CUT = 0x34,
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VERSION_NORMA_UMC_CHIP_8723_1T1R_B_CUT = 0x3c,
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VERSION_NORMAL_UMC_CHIP_88C_B_CUT = 0x70,
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VERSION_NORMAL_UMC_CHIP_92C_B_CUT = 0x71,
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VERSION_NORMAL_UMC_CHIP_92C_1T2R_B_CUT = 0x73,
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VERSION_TEST_CHIP_92D_SINGLEPHY = 0x300,
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VERSION_TEST_CHIP_92D_DUALPHY = 0x100,
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VERSION_NORMAL_CHIP_92D_SINGLEPHY = 0x310,
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VERSION_NORMAL_CHIP_92D_DUALPHY = 0x110,
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VERSION_NORMAL_CHIP_92D_C_CUT_SINGLEPHY = 0x710,
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VERSION_NORMAL_CHIP_92D_C_CUT_DUALPHY = 0x510,
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VERSION_NORMAL_CHIP_92D_D_CUT_SINGLEPHY = 0xB10,
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VERSION_NORMAL_CHIP_92D_D_CUT_DUALPHY = 0x910,
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VERSION_TEST_CHIP_88C = 0x0000,
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VERSION_TEST_CHIP_92C = 0x0020,
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VERSION_TEST_UMC_CHIP_8723 = 0x0081,
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VERSION_NORMAL_TSMC_CHIP_88C = 0x0008,
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VERSION_NORMAL_TSMC_CHIP_92C = 0x0028,
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VERSION_NORMAL_TSMC_CHIP_92C_1T2R = 0x0018,
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VERSION_NORMAL_UMC_CHIP_88C_A_CUT = 0x0088,
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VERSION_NORMAL_UMC_CHIP_92C_A_CUT = 0x00a8,
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VERSION_NORMAL_UMC_CHIP_92C_1T2R_A_CUT = 0x0098,
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VERSION_NORMAL_UMC_CHIP_8723_1T1R_A_CUT = 0x0089,
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VERSION_NORMAL_UMC_CHIP_8723_1T1R_B_CUT = 0x1089,
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VERSION_NORMAL_UMC_CHIP_88C_B_CUT = 0x1088,
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VERSION_NORMAL_UMC_CHIP_92C_B_CUT = 0x10a8,
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VERSION_NORMAL_UMC_CHIP_92C_1T2R_B_CUT = 0x1090,
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VERSION_TEST_CHIP_92D_SINGLEPHY = 0x0022,
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VERSION_TEST_CHIP_92D_DUALPHY = 0x0002,
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VERSION_NORMAL_CHIP_92D_SINGLEPHY = 0x002a,
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VERSION_NORMAL_CHIP_92D_DUALPHY = 0x000a,
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VERSION_NORMAL_CHIP_92D_C_CUT_SINGLEPHY = 0x202a,
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VERSION_NORMAL_CHIP_92D_C_CUT_DUALPHY = 0x200a,
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VERSION_NORMAL_CHIP_92D_D_CUT_SINGLEPHY = 0x302a,
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VERSION_NORMAL_CHIP_92D_D_CUT_DUALPHY = 0x300a,
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VERSION_NORMAL_CHIP_92D_E_CUT_SINGLEPHY = 0x402a,
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VERSION_NORMAL_CHIP_92D_E_CUT_DUALPHY = 0x400a,
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};
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#define IS_92D_SINGLEPHY(version) \
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((version & CHIP_92D_SINGLEPHY) ? true : false)
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#define IS_92D_C_CUT(version) \
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((version & CHIP_92D_C_CUT) ? true : false)
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#define IS_92D_D_CUT(version) \
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((version & CHIP_92D_D_CUT) ? true : false)
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/* for 92D */
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#define CHIP_92D_SINGLEPHY BIT(9)
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#define C_CUT_VERSION BIT(13)
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#define D_CUT_VERSION ((BIT(12)|BIT(13)))
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#define E_CUT_VERSION BIT(14)
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/* Chip specific */
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#define CHIP_BONDING_IDENTIFIER(_value) (((_value)>>22)&0x3)
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#define CHIP_BONDING_92C_1T2R 0x1
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#define CHIP_BONDING_88C_USB_MCARD 0x2
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#define CHIP_BONDING_88C_USB_HP 0x1
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/* [15:12] IC version(CUT): A-cut=0, B-cut=1, C-cut=2, D-cut=3 */
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/* [7] Manufacturer: TSMC=0, UMC=1 */
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/* [6:4] RF type: 1T1R=0, 1T2R=1, 2T2R=2 */
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/* [3] Chip type: TEST=0, NORMAL=1 */
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/* [2:0] IC type: 81xxC=0, 8723=1, 92D=2 */
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#define CHIP_8723 BIT(0)
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#define CHIP_92D BIT(1)
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#define NORMAL_CHIP BIT(3)
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#define RF_TYPE_1T1R (~(BIT(4)|BIT(5)|BIT(6)))
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#define RF_TYPE_1T2R BIT(4)
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#define RF_TYPE_2T2R BIT(5)
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#define CHIP_VENDOR_UMC BIT(7)
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#define B_CUT_VERSION BIT(12)
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/* MASK */
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#define IC_TYPE_MASK (BIT(0)|BIT(1)|BIT(2))
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#define CHIP_TYPE_MASK BIT(3)
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#define RF_TYPE_MASK (BIT(4)|BIT(5)|BIT(6))
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#define MANUFACTUER_MASK BIT(7)
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#define ROM_VERSION_MASK (BIT(11)|BIT(10)|BIT(9)|BIT(8))
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#define CUT_VERSION_MASK (BIT(15)|BIT(14)|BIT(13)|BIT(12))
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/* Get element */
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#define GET_CVID_IC_TYPE(version) ((version) & IC_TYPE_MASK)
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#define GET_CVID_CHIP_TYPE(version) ((version) & CHIP_TYPE_MASK)
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#define GET_CVID_RF_TYPE(version) ((version) & RF_TYPE_MASK)
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#define GET_CVID_MANUFACTUER(version) ((version) & MANUFACTUER_MASK)
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#define GET_CVID_ROM_VERSION(version) ((version) & ROM_VERSION_MASK)
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#define GET_CVID_CUT_VERSION(version) ((version) & CUT_VERSION_MASK)
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#define IS_1T1R(version) ((GET_CVID_RF_TYPE(version)) ? \
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false : true)
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#define IS_1T2R(version) ((GET_CVID_RF_TYPE(version) == \
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RF_TYPE_1T2R) ? true : false)
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#define IS_2T2R(version) ((GET_CVID_RF_TYPE(version) == \
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RF_TYPE_2T2R) ? true : false)
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#define IS_92D_SINGLEPHY(version) ((IS_92D(version)) ? \
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(IS_2T2R(version) ? true : false) : false)
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#define IS_92D(version) ((GET_CVID_IC_TYPE(version) == \
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CHIP_92D) ? true : false)
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#define IS_92D_C_CUT(version) ((IS_92D(version)) ? \
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((GET_CVID_CUT_VERSION(version) == \
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0x2000) ? true : false) : false)
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#define IS_92D_D_CUT(version) ((IS_92D(version)) ? \
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((GET_CVID_CUT_VERSION(version) == \
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0x3000) ? true : false) : false)
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#define IS_92D_E_CUT(version) ((IS_92D(version)) ? \
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((GET_CVID_CUT_VERSION(version) == \
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0x4000) ? true : false) : false)
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#define CHIP_92D_C_CUT BIT(10)
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#define CHIP_92D_D_CUT BIT(11)
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enum rf_optype {
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RF_OP_BY_SW_3WIRE = 0,
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@ -1608,17 +1608,16 @@ static void _rtl92de_read_txpower_info(struct ieee80211_hw *hw,
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tempval[0] = hwinfo[EEPROM_IQK_DELTA] & 0x03;
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tempval[1] = (hwinfo[EEPROM_LCK_DELTA] & 0x0C) >> 2;
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rtlefuse->txpwr_fromeprom = true;
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if (IS_92D_D_CUT(rtlpriv->rtlhal.version)) {
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if (IS_92D_D_CUT(rtlpriv->rtlhal.version) ||
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IS_92D_E_CUT(rtlpriv->rtlhal.version)) {
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rtlefuse->internal_pa_5g[0] =
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!((hwinfo[EEPROM_TSSI_A_5G] &
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BIT(6)) >> 6);
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!((hwinfo[EEPROM_TSSI_A_5G] & BIT(6)) >> 6);
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rtlefuse->internal_pa_5g[1] =
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!((hwinfo[EEPROM_TSSI_B_5G] &
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BIT(6)) >> 6);
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RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
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!((hwinfo[EEPROM_TSSI_B_5G] & BIT(6)) >> 6);
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RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
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("Is D cut,Internal PA0 %d Internal PA1 %d\n",
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rtlefuse->internal_pa_5g[0],
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rtlefuse->internal_pa_5g[1]))
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rtlefuse->internal_pa_5g[0],
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rtlefuse->internal_pa_5g[1]))
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}
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rtlefuse->eeprom_c9 = hwinfo[EEPROM_RF_OPT6];
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rtlefuse->eeprom_cc = hwinfo[EEPROM_RF_OPT7];
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