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staging: sm750fb: use BIT macro for CRT_DISPLAY_CTRL single-bit fields
Replace complex definition of CRT_DISPLAY_CTRL register fields with BIT() macro and use open-coded implementation for register manipulation Signed-off-by: Mike Rapoport <mike.rapoport@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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0f23be7050
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@ -155,7 +155,7 @@ void ddk750_setLogicalDispOut(disp_output_t output)
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reg = PEEK32(CRT_DISPLAY_CTRL);
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reg = FIELD_VALUE(reg, CRT_DISPLAY_CTRL, SELECT, (output & CRT_2_MASK)>>CRT_2_OFFSET);
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/*se blank off */
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reg = FIELD_SET(reg, CRT_DISPLAY_CTRL, BLANK, OFF);
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reg &= ~CRT_DISPLAY_CTRL_BLANK;
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POKE32(CRT_DISPLAY_CTRL, reg);
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}
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@ -61,8 +61,7 @@ static unsigned long displayControlAdjust_SM750LE(mode_parameter_t *pModeParam,
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dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL25);
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/* Set bit 25:24 of display controller */
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dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CRTSELECT, CRT);
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dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, RGBBIT, 24BIT);
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dispControl |= (CRT_DISPLAY_CTRL_CRTSELECT | CRT_DISPLAY_CTRL_RGBBIT);
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/* Set bit 14 of display controller */
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dispControl = DISPLAY_CTRL_CLOCK_PHASE;
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@ -1331,38 +1331,19 @@
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#define CRT_DISPLAY_CTRL_CLK_PLL80 5
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#define CRT_DISPLAY_CTRL_CLK_PLL108 6
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#define CRT_DISPLAY_CTRL_CLK_RESERVED 7
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#define CRT_DISPLAY_CTRL_SHIFT_VGA_DAC 26:26
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#define CRT_DISPLAY_CTRL_SHIFT_VGA_DAC_DISABLE 1
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#define CRT_DISPLAY_CTRL_SHIFT_VGA_DAC_ENABLE 0
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#define CRT_DISPLAY_CTRL_SHIFT_VGA_DAC BIT(26)
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/* SM750LE definition */
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#define CRT_DISPLAY_CTRL_CRTSELECT 25:25
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#define CRT_DISPLAY_CTRL_CRTSELECT_VGA 0
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#define CRT_DISPLAY_CTRL_CRTSELECT_CRT 1
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#define CRT_DISPLAY_CTRL_RGBBIT 24:24
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#define CRT_DISPLAY_CTRL_RGBBIT_24BIT 0
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#define CRT_DISPLAY_CTRL_RGBBIT_12BIT 1
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#define CRT_DISPLAY_CTRL_CRTSELECT BIT(25)
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#define CRT_DISPLAY_CTRL_RGBBIT BIT(24)
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#ifndef VALIDATION_CHIP
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#define CRT_DISPLAY_CTRL_SHIFT_VGA_DAC 26:26
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#define CRT_DISPLAY_CTRL_SHIFT_VGA_DAC_DISABLE 1
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#define CRT_DISPLAY_CTRL_SHIFT_VGA_DAC_ENABLE 0
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#define CRT_DISPLAY_CTRL_CENTERING 24:24
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#define CRT_DISPLAY_CTRL_CENTERING_DISABLE 0
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#define CRT_DISPLAY_CTRL_CENTERING_ENABLE 1
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#define CRT_DISPLAY_CTRL_CENTERING BIT(24)
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#endif
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#define CRT_DISPLAY_CTRL_LOCK_TIMING 23:23
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#define CRT_DISPLAY_CTRL_LOCK_TIMING_DISABLE 0
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#define CRT_DISPLAY_CTRL_LOCK_TIMING_ENABLE 1
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#define CRT_DISPLAY_CTRL_EXPANSION 22:22
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#define CRT_DISPLAY_CTRL_EXPANSION_DISABLE 0
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#define CRT_DISPLAY_CTRL_EXPANSION_ENABLE 1
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#define CRT_DISPLAY_CTRL_VERTICAL_MODE 21:21
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#define CRT_DISPLAY_CTRL_VERTICAL_MODE_REPLICATE 0
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#define CRT_DISPLAY_CTRL_VERTICAL_MODE_INTERPOLATE 1
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#define CRT_DISPLAY_CTRL_HORIZONTAL_MODE 20:20
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#define CRT_DISPLAY_CTRL_HORIZONTAL_MODE_REPLICATE 0
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#define CRT_DISPLAY_CTRL_HORIZONTAL_MODE_INTERPOLATE 1
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#define CRT_DISPLAY_CTRL_LOCK_TIMING BIT(23)
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#define CRT_DISPLAY_CTRL_EXPANSION BIT(22)
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#define CRT_DISPLAY_CTRL_VERTICAL_MODE BIT(21)
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#define CRT_DISPLAY_CTRL_HORIZONTAL_MODE BIT(20)
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#define CRT_DISPLAY_CTRL_SELECT 19:18
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#define CRT_DISPLAY_CTRL_SELECT_PANEL 0
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#define CRT_DISPLAY_CTRL_SELECT_VGA 1
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@ -1372,9 +1353,7 @@
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#define CRT_DISPLAY_CTRL_FIFO_3 1
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#define CRT_DISPLAY_CTRL_FIFO_7 2
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#define CRT_DISPLAY_CTRL_FIFO_11 3
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#define CRT_DISPLAY_CTRL_BLANK 10:10
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#define CRT_DISPLAY_CTRL_BLANK_OFF 0
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#define CRT_DISPLAY_CTRL_BLANK_ON 1
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#define CRT_DISPLAY_CTRL_BLANK BIT(10)
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#define CRT_DISPLAY_CTRL_PIXEL 7:4
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#define CRT_DISPLAY_CTRL_FORMAT 1:0
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#define CRT_DISPLAY_CTRL_FORMAT_8 0
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@ -378,31 +378,35 @@ int hw_sm750le_setBLANK(struct lynxfb_output *output, int blank)
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switch (blank) {
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case FB_BLANK_UNBLANK:
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dpms = CRT_DISPLAY_CTRL_DPMS_0;
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crtdb = CRT_DISPLAY_CTRL_BLANK_OFF;
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crtdb = 0;
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break;
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case FB_BLANK_NORMAL:
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dpms = CRT_DISPLAY_CTRL_DPMS_0;
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crtdb = CRT_DISPLAY_CTRL_BLANK_ON;
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crtdb = CRT_DISPLAY_CTRL_BLANK;
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break;
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case FB_BLANK_VSYNC_SUSPEND:
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dpms = CRT_DISPLAY_CTRL_DPMS_2;
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crtdb = CRT_DISPLAY_CTRL_BLANK_ON;
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crtdb = CRT_DISPLAY_CTRL_BLANK;
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break;
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case FB_BLANK_HSYNC_SUSPEND:
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dpms = CRT_DISPLAY_CTRL_DPMS_1;
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crtdb = CRT_DISPLAY_CTRL_BLANK_ON;
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crtdb = CRT_DISPLAY_CTRL_BLANK;
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break;
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case FB_BLANK_POWERDOWN:
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dpms = CRT_DISPLAY_CTRL_DPMS_3;
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crtdb = CRT_DISPLAY_CTRL_BLANK_ON;
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crtdb = CRT_DISPLAY_CTRL_BLANK;
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break;
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default:
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return -EINVAL;
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}
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if (output->paths & sm750_crt) {
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unsigned int val;
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POKE32(CRT_DISPLAY_CTRL, FIELD_VALUE(PEEK32(CRT_DISPLAY_CTRL), CRT_DISPLAY_CTRL, DPMS, dpms));
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POKE32(CRT_DISPLAY_CTRL, FIELD_VALUE(PEEK32(CRT_DISPLAY_CTRL), CRT_DISPLAY_CTRL, BLANK, crtdb));
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val = PEEK32(CRT_DISPLAY_CTRL) & ~CRT_DISPLAY_CTRL_BLANK;
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POKE32(CRT_DISPLAY_CTRL, val | crtdb);
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}
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return 0;
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}
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@ -418,24 +422,23 @@ int hw_sm750_setBLANK(struct lynxfb_output *output, int blank)
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pr_debug("flag = FB_BLANK_UNBLANK\n");
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dpms = SYSTEM_CTRL_DPMS_VPHP;
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pps = PANEL_DISPLAY_CTRL_DATA;
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crtdb = CRT_DISPLAY_CTRL_BLANK_OFF;
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break;
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case FB_BLANK_NORMAL:
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pr_debug("flag = FB_BLANK_NORMAL\n");
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dpms = SYSTEM_CTRL_DPMS_VPHP;
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crtdb = CRT_DISPLAY_CTRL_BLANK_ON;
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crtdb = CRT_DISPLAY_CTRL_BLANK;
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break;
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case FB_BLANK_VSYNC_SUSPEND:
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dpms = SYSTEM_CTRL_DPMS_VNHP;
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crtdb = CRT_DISPLAY_CTRL_BLANK_ON;
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crtdb = CRT_DISPLAY_CTRL_BLANK;
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break;
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case FB_BLANK_HSYNC_SUSPEND:
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dpms = SYSTEM_CTRL_DPMS_VPHN;
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crtdb = CRT_DISPLAY_CTRL_BLANK_ON;
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crtdb = CRT_DISPLAY_CTRL_BLANK;
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break;
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case FB_BLANK_POWERDOWN:
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dpms = SYSTEM_CTRL_DPMS_VNHN;
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crtdb = CRT_DISPLAY_CTRL_BLANK_ON;
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crtdb = CRT_DISPLAY_CTRL_BLANK;
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break;
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}
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@ -443,7 +446,9 @@ int hw_sm750_setBLANK(struct lynxfb_output *output, int blank)
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unsigned int val = PEEK32(SYSTEM_CTRL) & ~SYSTEM_CTRL_DPMS_MASK;
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POKE32(SYSTEM_CTRL, val | dpms);
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POKE32(CRT_DISPLAY_CTRL, FIELD_VALUE(PEEK32(CRT_DISPLAY_CTRL), CRT_DISPLAY_CTRL, BLANK, crtdb));
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val = PEEK32(CRT_DISPLAY_CTRL) & ~CRT_DISPLAY_CTRL_BLANK;
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POKE32(CRT_DISPLAY_CTRL, val | crtdb);
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}
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if (output->paths & sm750_panel) {
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