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drm/i915: Allow 1 vblank to let Sink CRC calculation to start or stop.
According to VESA DP Spec, setting TEST_SINK_START (bit 0) of TEST_SINK (00270h) "Stop/Start calculating CRC on the next frame" So let's wait at least 1 vblank to really say the calculation stopped or started. Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -3949,6 +3949,7 @@ intel_dp_probe_mst(struct intel_dp *intel_dp)
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static int intel_dp_sink_crc_stop(struct intel_dp *intel_dp)
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static int intel_dp_sink_crc_stop(struct intel_dp *intel_dp)
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{
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{
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struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
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struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
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struct drm_device *dev = dig_port->base.base.dev;
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struct intel_crtc *intel_crtc = to_intel_crtc(dig_port->base.base.crtc);
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struct intel_crtc *intel_crtc = to_intel_crtc(dig_port->base.base.crtc);
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u8 buf;
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u8 buf;
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int ret = 0;
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int ret = 0;
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@ -3966,6 +3967,7 @@ static int intel_dp_sink_crc_stop(struct intel_dp *intel_dp)
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goto out;
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goto out;
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}
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}
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intel_wait_for_vblank(dev, intel_crtc->pipe);
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intel_dp->sink_crc.started = false;
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intel_dp->sink_crc.started = false;
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out:
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out:
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hsw_enable_ips(intel_crtc);
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hsw_enable_ips(intel_crtc);
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@ -3975,6 +3977,7 @@ static int intel_dp_sink_crc_stop(struct intel_dp *intel_dp)
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static int intel_dp_sink_crc_start(struct intel_dp *intel_dp)
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static int intel_dp_sink_crc_start(struct intel_dp *intel_dp)
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{
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{
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struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
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struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
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struct drm_device *dev = dig_port->base.base.dev;
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struct intel_crtc *intel_crtc = to_intel_crtc(dig_port->base.base.crtc);
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struct intel_crtc *intel_crtc = to_intel_crtc(dig_port->base.base.crtc);
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u8 buf;
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u8 buf;
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int ret;
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int ret;
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@ -4004,6 +4007,7 @@ static int intel_dp_sink_crc_start(struct intel_dp *intel_dp)
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return -EIO;
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return -EIO;
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}
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}
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intel_wait_for_vblank(dev, intel_crtc->pipe);
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intel_dp->sink_crc.started = true;
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intel_dp->sink_crc.started = true;
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return 0;
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return 0;
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}
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}
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