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arch/tile: update some comments to clarify register usage.
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
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@ -1553,6 +1553,8 @@ STD_ENTRY(_sys_clone)
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* to be available to it on entry. It does not modify any callee-save
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* registers (including "lr"). It does not check what PL it is being
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* called at, so you'd better not call it other than at PL0.
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* The <atomic.h> wrapper assumes it only clobbers r20-r29, so if
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* it ever is necessary to use more registers, be aware.
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*
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* It does not use the stack, but since it might be re-interrupted by
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* a page fault which would assume the stack was valid, it does
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@ -214,9 +214,10 @@ int copy_thread(unsigned long clone_flags, unsigned long sp,
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/*
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* Copy the callee-saved registers from the passed pt_regs struct
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* into the context-switch callee-saved registers area.
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* We have to restore the callee-saved registers since we may
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* be cloning a userspace task with userspace register state,
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* and we won't be unwinding the same kernel frames to restore them.
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* This way when we start the interrupt-return sequence, the
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* callee-save registers will be correctly in registers, which
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* is how we assume the compiler leaves them as we start doing
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* the normal return-from-interrupt path after calling C code.
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* Zero out the C ABI save area to mark the top of the stack.
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*/
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ksp = (unsigned long) childregs;
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