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dmaengine: dw-edma: Add support for chip-specific flags
Add a "flags" field to the "struct dw_edma_chip" so that the controller drivers can pass flags that are relevant to the platform. DW_EDMA_CHIP_LOCAL - Used by the controller drivers accessing eDMA locally. Local eDMA access doesn't require generating MSIs to the remote. Link: https://lore.kernel.org/r/20220524152159.2370739-8-Frank.Li@nxp.com Tested-by: Serge Semin <fancer.lancer@gmail.com> Tested-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Serge Semin <fancer.lancer@gmail.com> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Acked-By: Vinod Koul <vkoul@kernel.org>
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@ -301,6 +301,7 @@ u32 dw_edma_v0_core_status_abort_int(struct dw_edma *dw, enum dw_edma_dir dir)
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static void dw_edma_v0_core_write_chunk(struct dw_edma_chunk *chunk)
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{
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struct dw_edma_burst *child;
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struct dw_edma_chan *chan = chunk->chan;
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struct dw_edma_v0_lli __iomem *lli;
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struct dw_edma_v0_llp __iomem *llp;
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u32 control = 0, i = 0;
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@ -314,9 +315,11 @@ static void dw_edma_v0_core_write_chunk(struct dw_edma_chunk *chunk)
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j = chunk->bursts_alloc;
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list_for_each_entry(child, &chunk->burst->list, list) {
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j--;
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if (!j)
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control |= (DW_EDMA_V0_LIE | DW_EDMA_V0_RIE);
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if (!j) {
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control |= DW_EDMA_V0_LIE;
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if (!(chan->dw->chip->flags & DW_EDMA_CHIP_LOCAL))
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control |= DW_EDMA_V0_RIE;
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}
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/* Channel control */
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SET_LL_32(&lli[i].control, control);
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/* Transfer size */
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@ -33,12 +33,21 @@ enum dw_edma_map_format {
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EDMA_MF_HDMA_COMPAT = 0x5
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};
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/**
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* enum dw_edma_chip_flags - Flags specific to an eDMA chip
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* @DW_EDMA_CHIP_LOCAL: eDMA is used locally by an endpoint
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*/
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enum dw_edma_chip_flags {
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DW_EDMA_CHIP_LOCAL = BIT(0),
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};
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/**
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* struct dw_edma_chip - representation of DesignWare eDMA controller hardware
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* @dev: struct device of the eDMA controller
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* @id: instance ID
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* @nr_irqs: total number of DMA IRQs
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* @ops DMA channel to IRQ number mapping
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* @flags dw_edma_chip_flags
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* @reg_base DMA register base address
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* @ll_wr_cnt DMA write link list count
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* @ll_rd_cnt DMA read link list count
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@ -55,6 +64,7 @@ struct dw_edma_chip {
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int id;
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int nr_irqs;
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const struct dw_edma_core_ops *ops;
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u32 flags;
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void __iomem *reg_base;
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