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scsi: stex: Support Pegasus 3 product
Pegasus series is a RAID support product using Thunderbolt technology. The newest product, Pegasus 3(P3) supports Thunderbolt 3 technology with a different chip. 1. Change driver version. 2. Add P3 VID, DID and define it's device address. 3. P3 use msi interrupt, so stex_request_irq P3 type enable msi. 4. For hibernation, use msi_lock in stex_ss_handshake to prevent msi register write again when handshaking. 5. P3 doesn't need read() as flush. 6. In stex_ss_intr & stex_abort, P3 only clear interrupt register when getting vendor defined interrupt. Signed-off-by: Charles.Chiou <charles.chiou@tw.promise.com> Signed-off-by: Paul.Lyu <paul.lyu@tw.promise.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
This commit is contained in:
Charles
Martin K. Petersen
parent
6dc618cdd6
commit
d65702272c
@ -38,9 +38,9 @@
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#include <scsi/scsi_eh.h>
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#define DRV_NAME "stex"
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#define ST_DRIVER_VERSION "5.00.0000.01"
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#define ST_VER_MAJOR 5
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#define ST_VER_MINOR 00
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#define ST_DRIVER_VERSION "6.02.0000.01"
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#define ST_VER_MAJOR 6
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#define ST_VER_MINOR 02
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#define ST_OEM 0000
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#define ST_BUILD_VER 01
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@ -64,6 +64,13 @@ enum {
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YI2H_INT_C = 0xa0,
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YH2I_REQ = 0xc0,
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YH2I_REQ_HI = 0xc4,
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PSCRATCH0 = 0xb0,
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PSCRATCH1 = 0xb4,
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PSCRATCH2 = 0xb8,
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PSCRATCH3 = 0xbc,
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PSCRATCH4 = 0xc8,
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MAILBOX_BASE = 0x1000,
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MAILBOX_HNDSHK_STS = 0x0,
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/* MU register value */
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MU_INBOUND_DOORBELL_HANDSHAKE = (1 << 0),
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@ -87,7 +94,7 @@ enum {
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MU_STATE_STOP = 5,
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MU_STATE_NOCONNECT = 6,
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MU_MAX_DELAY = 120,
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MU_MAX_DELAY = 50,
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MU_HANDSHAKE_SIGNATURE = 0x55aaaa55,
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MU_HANDSHAKE_SIGNATURE_HALF = 0x5a5a0000,
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MU_HARD_RESET_WAIT = 30000,
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@ -135,6 +142,7 @@ enum {
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st_yosemite = 2,
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st_seq = 3,
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st_yel = 4,
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st_P3 = 5,
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PASSTHRU_REQ_TYPE = 0x00000001,
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PASSTHRU_REQ_NO_WAKEUP = 0x00000100,
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@ -339,6 +347,7 @@ struct st_hba {
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u16 rq_size;
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u16 sts_count;
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u8 supports_pm;
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int msi_lock;
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};
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struct st_card_info {
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@ -540,11 +549,15 @@ stex_ss_send_cmd(struct st_hba *hba, struct req_msg *req, u16 tag)
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++hba->req_head;
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hba->req_head %= hba->rq_count+1;
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writel((addr >> 16) >> 16, hba->mmio_base + YH2I_REQ_HI);
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readl(hba->mmio_base + YH2I_REQ_HI); /* flush */
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writel(addr, hba->mmio_base + YH2I_REQ);
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readl(hba->mmio_base + YH2I_REQ); /* flush */
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if (hba->cardtype == st_P3) {
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writel((addr >> 16) >> 16, hba->mmio_base + YH2I_REQ_HI);
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writel(addr, hba->mmio_base + YH2I_REQ);
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} else {
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writel((addr >> 16) >> 16, hba->mmio_base + YH2I_REQ_HI);
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readl(hba->mmio_base + YH2I_REQ_HI); /* flush */
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writel(addr, hba->mmio_base + YH2I_REQ);
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readl(hba->mmio_base + YH2I_REQ); /* flush */
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}
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}
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static void return_abnormal_state(struct st_hba *hba, int status)
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@ -974,15 +987,31 @@ static irqreturn_t stex_ss_intr(int irq, void *__hba)
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spin_lock_irqsave(hba->host->host_lock, flags);
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data = readl(base + YI2H_INT);
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if (data && data != 0xffffffff) {
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/* clear the interrupt */
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writel(data, base + YI2H_INT_C);
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stex_ss_mu_intr(hba);
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spin_unlock_irqrestore(hba->host->host_lock, flags);
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if (unlikely(data & SS_I2H_REQUEST_RESET))
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queue_work(hba->work_q, &hba->reset_work);
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return IRQ_HANDLED;
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if (hba->cardtype == st_yel) {
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data = readl(base + YI2H_INT);
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if (data && data != 0xffffffff) {
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/* clear the interrupt */
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writel(data, base + YI2H_INT_C);
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stex_ss_mu_intr(hba);
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spin_unlock_irqrestore(hba->host->host_lock, flags);
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if (unlikely(data & SS_I2H_REQUEST_RESET))
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queue_work(hba->work_q, &hba->reset_work);
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return IRQ_HANDLED;
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}
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} else {
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data = readl(base + PSCRATCH4);
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if (data != 0xffffffff) {
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if (data != 0) {
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/* clear the interrupt */
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writel(data, base + PSCRATCH1);
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writel((1 << 22), base + YH2I_INT);
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}
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stex_ss_mu_intr(hba);
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spin_unlock_irqrestore(hba->host->host_lock, flags);
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if (unlikely(data & SS_I2H_REQUEST_RESET))
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queue_work(hba->work_q, &hba->reset_work);
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return IRQ_HANDLED;
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}
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}
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spin_unlock_irqrestore(hba->host->host_lock, flags);
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@ -1080,19 +1109,36 @@ static int stex_ss_handshake(struct st_hba *hba)
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struct st_msg_header *msg_h;
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struct handshake_frame *h;
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__le32 *scratch;
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u32 data, scratch_size;
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u32 data, scratch_size, mailboxdata, operationaldata;
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unsigned long before;
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int ret = 0;
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before = jiffies;
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while ((readl(base + YIOA_STATUS) & SS_MU_OPERATIONAL) == 0) {
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if (time_after(jiffies, before + MU_MAX_DELAY * HZ)) {
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printk(KERN_ERR DRV_NAME
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"(%s): firmware not operational\n",
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pci_name(hba->pdev));
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return -1;
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if (hba->cardtype == st_yel) {
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operationaldata = readl(base + YIOA_STATUS);
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while (operationaldata != SS_MU_OPERATIONAL) {
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if (time_after(jiffies, before + MU_MAX_DELAY * HZ)) {
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printk(KERN_ERR DRV_NAME
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"(%s): firmware not operational\n",
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pci_name(hba->pdev));
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return -1;
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}
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msleep(1);
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operationaldata = readl(base + YIOA_STATUS);
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}
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} else {
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operationaldata = readl(base + PSCRATCH3);
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while (operationaldata != SS_MU_OPERATIONAL) {
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if (time_after(jiffies, before + MU_MAX_DELAY * HZ)) {
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printk(KERN_ERR DRV_NAME
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"(%s): firmware not operational\n",
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pci_name(hba->pdev));
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return -1;
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}
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msleep(1);
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operationaldata = readl(base + PSCRATCH3);
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}
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msleep(1);
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}
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msg_h = (struct st_msg_header *)hba->dma_mem;
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@ -1111,30 +1157,60 @@ static int stex_ss_handshake(struct st_hba *hba)
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scratch_size = (hba->sts_count+1)*sizeof(u32);
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h->scratch_size = cpu_to_le32(scratch_size);
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data = readl(base + YINT_EN);
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data &= ~4;
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writel(data, base + YINT_EN);
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writel((hba->dma_handle >> 16) >> 16, base + YH2I_REQ_HI);
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readl(base + YH2I_REQ_HI);
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writel(hba->dma_handle, base + YH2I_REQ);
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readl(base + YH2I_REQ); /* flush */
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scratch = hba->scratch;
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before = jiffies;
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while (!(le32_to_cpu(*scratch) & SS_STS_HANDSHAKE)) {
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if (time_after(jiffies, before + MU_MAX_DELAY * HZ)) {
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printk(KERN_ERR DRV_NAME
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"(%s): no signature after handshake frame\n",
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pci_name(hba->pdev));
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ret = -1;
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break;
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if (hba->cardtype == st_yel) {
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data = readl(base + YINT_EN);
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data &= ~4;
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writel(data, base + YINT_EN);
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writel((hba->dma_handle >> 16) >> 16, base + YH2I_REQ_HI);
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readl(base + YH2I_REQ_HI);
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writel(hba->dma_handle, base + YH2I_REQ);
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readl(base + YH2I_REQ); /* flush */
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} else {
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data = readl(base + YINT_EN);
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data &= ~(1 << 0);
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data &= ~(1 << 2);
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writel(data, base + YINT_EN);
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if (hba->msi_lock == 0) {
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/* P3 MSI Register cannot access twice */
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writel((1 << 6), base + YH2I_INT);
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hba->msi_lock = 1;
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}
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rmb();
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msleep(1);
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writel((hba->dma_handle >> 16) >> 16, base + YH2I_REQ_HI);
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writel(hba->dma_handle, base + YH2I_REQ);
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}
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before = jiffies;
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scratch = hba->scratch;
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if (hba->cardtype == st_yel) {
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while (!(le32_to_cpu(*scratch) & SS_STS_HANDSHAKE)) {
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if (time_after(jiffies, before + MU_MAX_DELAY * HZ)) {
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printk(KERN_ERR DRV_NAME
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"(%s): no signature after handshake frame\n",
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pci_name(hba->pdev));
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ret = -1;
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break;
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}
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rmb();
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msleep(1);
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}
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} else {
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mailboxdata = readl(base + MAILBOX_BASE + MAILBOX_HNDSHK_STS);
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while (mailboxdata != SS_STS_HANDSHAKE) {
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if (time_after(jiffies, before + MU_MAX_DELAY * HZ)) {
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printk(KERN_ERR DRV_NAME
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"(%s): no signature after handshake frame\n",
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pci_name(hba->pdev));
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ret = -1;
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break;
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}
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rmb();
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msleep(1);
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mailboxdata = readl(base + MAILBOX_BASE + MAILBOX_HNDSHK_STS);
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}
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}
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memset(scratch, 0, scratch_size);
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msg_h->flag = 0;
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return ret;
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}
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@ -1144,8 +1220,10 @@ static int stex_handshake(struct st_hba *hba)
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unsigned long flags;
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unsigned int mu_status;
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err = (hba->cardtype == st_yel) ?
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stex_ss_handshake(hba) : stex_common_handshake(hba);
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if (hba->cardtype == st_yel || hba->cardtype == st_P3)
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err = stex_ss_handshake(hba);
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else
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err = stex_common_handshake(hba);
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spin_lock_irqsave(hba->host->host_lock, flags);
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mu_status = hba->mu_status;
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if (err == 0) {
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@ -1190,6 +1268,15 @@ static int stex_abort(struct scsi_cmnd *cmd)
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writel(data, base + YI2H_INT_C);
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stex_ss_mu_intr(hba);
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} else if (hba->cardtype == st_P3) {
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data = readl(base + PSCRATCH4);
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if (data == 0xffffffff)
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goto fail_out;
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if (data != 0) {
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writel(data, base + PSCRATCH1);
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writel((1 << 22), base + YH2I_INT);
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}
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stex_ss_mu_intr(hba);
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} else {
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data = readl(base + ODBL);
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if (data == 0 || data == 0xffffffff)
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@ -1197,7 +1284,6 @@ static int stex_abort(struct scsi_cmnd *cmd)
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writel(data, base + ODBL);
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readl(base + ODBL); /* flush */
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stex_mu_intr(hba, data);
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}
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if (hba->wait_ccb == NULL) {
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@ -1293,6 +1379,12 @@ static void stex_ss_reset(struct st_hba *hba)
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ssleep(5);
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}
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static void stex_p3_reset(struct st_hba *hba)
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{
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writel(SS_H2I_INT_RESET, hba->mmio_base + YH2I_INT);
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ssleep(5);
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}
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static int stex_do_reset(struct st_hba *hba)
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{
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unsigned long flags;
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@ -1329,7 +1421,8 @@ static int stex_do_reset(struct st_hba *hba)
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stex_hard_reset(hba);
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else if (hba->cardtype == st_yel)
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stex_ss_reset(hba);
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else if (hba->cardtype == st_P3)
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stex_p3_reset(hba);
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return_abnormal_state(hba, DID_RESET);
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@ -1414,6 +1507,26 @@ static struct pci_device_id stex_pci_tbl[] = {
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/* st_yel */
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{ 0x105a, 0x8650, 0x1033, PCI_ANY_ID, 0, 0, st_yel },
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{ 0x105a, 0x8760, PCI_ANY_ID, PCI_ANY_ID, 0, 0, st_yel },
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/* st_P3, pluto */
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{ PCI_VENDOR_ID_PROMISE, 0x8870, PCI_VENDOR_ID_PROMISE,
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0x8870, 0, 0, st_P3 },
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/* st_P3, p3 */
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{ PCI_VENDOR_ID_PROMISE, 0x8870, PCI_VENDOR_ID_PROMISE,
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0x4300, 0, 0, st_P3 },
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/* st_P3, SymplyStor4E */
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{ PCI_VENDOR_ID_PROMISE, 0x8871, PCI_VENDOR_ID_PROMISE,
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0x4311, 0, 0, st_P3 },
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/* st_P3, SymplyStor8E */
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{ PCI_VENDOR_ID_PROMISE, 0x8871, PCI_VENDOR_ID_PROMISE,
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0x4312, 0, 0, st_P3 },
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/* st_P3, SymplyStor4 */
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{ PCI_VENDOR_ID_PROMISE, 0x8871, PCI_VENDOR_ID_PROMISE,
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0x4321, 0, 0, st_P3 },
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/* st_P3, SymplyStor8 */
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{ PCI_VENDOR_ID_PROMISE, 0x8871, PCI_VENDOR_ID_PROMISE,
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0x4322, 0, 0, st_P3 },
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{ } /* terminate list */
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};
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@ -1482,6 +1595,19 @@ static struct st_card_info stex_card_info[] = {
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.map_sg = stex_ss_map_sg,
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.send = stex_ss_send_cmd,
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},
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/* st_P3 */
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{
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.max_id = 129,
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.max_lun = 256,
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.max_channel = 0,
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.rq_count = 801,
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.rq_size = 512,
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.sts_count = 801,
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.alloc_rq = stex_ss_alloc_req,
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.map_sg = stex_ss_map_sg,
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.send = stex_ss_send_cmd,
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},
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};
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static int stex_set_dma_mask(struct pci_dev * pdev)
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@ -1502,7 +1628,7 @@ static int stex_request_irq(struct st_hba *hba)
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struct pci_dev *pdev = hba->pdev;
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int status;
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if (msi) {
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if (msi || hba->cardtype == st_P3) {
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status = pci_enable_msi(pdev);
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if (status != 0)
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printk(KERN_ERR DRV_NAME
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@ -1513,7 +1639,8 @@ static int stex_request_irq(struct st_hba *hba)
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} else
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hba->msi_enabled = 0;
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status = request_irq(pdev->irq, hba->cardtype == st_yel ?
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status = request_irq(pdev->irq,
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(hba->cardtype == st_yel || hba->cardtype == st_P3) ?
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stex_ss_intr : stex_intr, IRQF_SHARED, DRV_NAME, hba);
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if (status != 0) {
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@ -1597,12 +1724,12 @@ static int stex_probe(struct pci_dev *pdev, const struct pci_device_id *id)
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case 0x4265:
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break;
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default:
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if (hba->cardtype == st_yel)
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if (hba->cardtype == st_yel || hba->cardtype == st_P3)
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hba->supports_pm = 1;
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}
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sts_offset = scratch_offset = (ci->rq_count+1) * ci->rq_size;
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if (hba->cardtype == st_yel)
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if (hba->cardtype == st_yel || hba->cardtype == st_P3)
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sts_offset += (ci->sts_count+1) * sizeof(u32);
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cp_offset = sts_offset + (ci->sts_count+1) * sizeof(struct status_msg);
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hba->dma_size = cp_offset + sizeof(struct st_frame);
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@ -1642,7 +1769,7 @@ static int stex_probe(struct pci_dev *pdev, const struct pci_device_id *id)
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goto out_pci_free;
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}
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if (hba->cardtype == st_yel)
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if (hba->cardtype == st_yel || hba->cardtype == st_P3)
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hba->scratch = (__le32 *)(hba->dma_mem + scratch_offset);
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hba->status_buffer = (struct status_msg *)(hba->dma_mem + sts_offset);
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hba->copy_buffer = hba->dma_mem + cp_offset;
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@ -1653,8 +1780,9 @@ static int stex_probe(struct pci_dev *pdev, const struct pci_device_id *id)
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hba->map_sg = ci->map_sg;
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hba->send = ci->send;
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hba->mu_status = MU_STATE_STARTING;
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hba->msi_lock = 0;
|
||||
|
||||
if (hba->cardtype == st_yel)
|
||||
if (hba->cardtype == st_yel || hba->cardtype == st_P3)
|
||||
host->sg_tablesize = 38;
|
||||
else
|
||||
host->sg_tablesize = 32;
|
||||
@ -1736,28 +1864,29 @@ static void stex_hba_stop(struct st_hba *hba, int st_sleep_mic)
|
||||
|
||||
spin_lock_irqsave(hba->host->host_lock, flags);
|
||||
|
||||
if (hba->cardtype == st_yel && hba->supports_pm == 1)
|
||||
{
|
||||
if(st_sleep_mic == ST_NOTHANDLED)
|
||||
{
|
||||
if ((hba->cardtype == st_yel || hba->cardtype == st_P3) &&
|
||||
hba->supports_pm == 1) {
|
||||
if (st_sleep_mic == ST_NOTHANDLED) {
|
||||
spin_unlock_irqrestore(hba->host->host_lock, flags);
|
||||
return;
|
||||
}
|
||||
}
|
||||
req = hba->alloc_rq(hba);
|
||||
if (hba->cardtype == st_yel) {
|
||||
if (hba->cardtype == st_yel || hba->cardtype == st_P3) {
|
||||
msg_h = (struct st_msg_header *)req - 1;
|
||||
memset(msg_h, 0, hba->rq_size);
|
||||
} else
|
||||
memset(req, 0, hba->rq_size);
|
||||
|
||||
if ((hba->cardtype == st_yosemite || hba->cardtype == st_yel)
|
||||
if ((hba->cardtype == st_yosemite || hba->cardtype == st_yel
|
||||
|| hba->cardtype == st_P3)
|
||||
&& st_sleep_mic == ST_IGNORED) {
|
||||
req->cdb[0] = MGT_CMD;
|
||||
req->cdb[1] = MGT_CMD_SIGNATURE;
|
||||
req->cdb[2] = CTLR_CONFIG_CMD;
|
||||
req->cdb[3] = CTLR_SHUTDOWN;
|
||||
} else if (hba->cardtype == st_yel && st_sleep_mic != ST_IGNORED) {
|
||||
} else if ((hba->cardtype == st_yel || hba->cardtype == st_P3)
|
||||
&& st_sleep_mic != ST_IGNORED) {
|
||||
req->cdb[0] = MGT_CMD;
|
||||
req->cdb[1] = MGT_CMD_SIGNATURE;
|
||||
req->cdb[2] = CTLR_CONFIG_CMD;
|
||||
@ -1768,16 +1897,13 @@ static void stex_hba_stop(struct st_hba *hba, int st_sleep_mic)
|
||||
req->cdb[1] = CTLR_POWER_STATE_CHANGE;
|
||||
req->cdb[2] = CTLR_POWER_SAVING;
|
||||
}
|
||||
|
||||
hba->ccb[tag].cmd = NULL;
|
||||
hba->ccb[tag].sg_count = 0;
|
||||
hba->ccb[tag].sense_bufflen = 0;
|
||||
hba->ccb[tag].sense_buffer = NULL;
|
||||
hba->ccb[tag].req_type = PASSTHRU_REQ_TYPE;
|
||||
|
||||
hba->send(hba, req, tag);
|
||||
spin_unlock_irqrestore(hba->host->host_lock, flags);
|
||||
|
||||
before = jiffies;
|
||||
while (hba->ccb[tag].req_type & PASSTHRU_REQ_TYPE) {
|
||||
if (time_after(jiffies, before + ST_INTERNAL_TIMEOUT * HZ)) {
|
||||
@ -1833,12 +1959,13 @@ static void stex_shutdown(struct pci_dev *pdev)
|
||||
stex_hba_stop(hba, ST_S5);
|
||||
}
|
||||
|
||||
static int stex_choice_sleep_mic(pm_message_t state)
|
||||
static int stex_choice_sleep_mic(struct st_hba *hba, pm_message_t state)
|
||||
{
|
||||
switch (state.event) {
|
||||
case PM_EVENT_SUSPEND:
|
||||
return ST_S3;
|
||||
case PM_EVENT_HIBERNATE:
|
||||
hba->msi_lock = 0;
|
||||
return ST_S4;
|
||||
default:
|
||||
return ST_NOTHANDLED;
|
||||
@ -1849,8 +1976,9 @@ static int stex_suspend(struct pci_dev *pdev, pm_message_t state)
|
||||
{
|
||||
struct st_hba *hba = pci_get_drvdata(pdev);
|
||||
|
||||
if (hba->cardtype == st_yel && hba->supports_pm == 1)
|
||||
stex_hba_stop(hba, stex_choice_sleep_mic(state));
|
||||
if ((hba->cardtype == st_yel || hba->cardtype == st_P3)
|
||||
&& hba->supports_pm == 1)
|
||||
stex_hba_stop(hba, stex_choice_sleep_mic(hba, state));
|
||||
else
|
||||
stex_hba_stop(hba, ST_IGNORED);
|
||||
return 0;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user