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net: stmmac: add EHL 2.5Gbps PCI info and PCI ID
Add EHL SGMII 2.5Gbps PCI info and PCI ID Signed-off-by: Voon Weifeng <weifeng.voon@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -537,30 +537,38 @@ static int __maybe_unused intel_eth_pci_resume(struct device *dev)
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static SIMPLE_DEV_PM_OPS(intel_eth_pm_ops, intel_eth_pci_suspend,
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intel_eth_pci_resume);
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#define PCI_DEVICE_ID_INTEL_QUARK_ID 0x0937
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#define PCI_DEVICE_ID_INTEL_EHL_RGMII1G_ID 0x4b30
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#define PCI_DEVICE_ID_INTEL_EHL_SGMII1G_ID 0x4b31
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#define PCI_DEVICE_ID_INTEL_QUARK_ID 0x0937
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#define PCI_DEVICE_ID_INTEL_EHL_RGMII1G_ID 0x4b30
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#define PCI_DEVICE_ID_INTEL_EHL_SGMII1G_ID 0x4b31
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#define PCI_DEVICE_ID_INTEL_EHL_SGMII2G5_ID 0x4b32
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/* Intel(R) Programmable Services Engine (Intel(R) PSE) consist of 2 MAC
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* which are named PSE0 and PSE1
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*/
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#define PCI_DEVICE_ID_INTEL_EHL_PSE0_RGMII1G_ID 0x4ba0
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#define PCI_DEVICE_ID_INTEL_EHL_PSE0_SGMII1G_ID 0x4ba1
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#define PCI_DEVICE_ID_INTEL_EHL_PSE1_RGMII1G_ID 0x4bb0
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#define PCI_DEVICE_ID_INTEL_EHL_PSE1_SGMII1G_ID 0x4bb1
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#define PCI_DEVICE_ID_INTEL_TGL_SGMII1G_ID 0xa0ac
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#define PCI_DEVICE_ID_INTEL_EHL_PSE0_RGMII1G_ID 0x4ba0
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#define PCI_DEVICE_ID_INTEL_EHL_PSE0_SGMII1G_ID 0x4ba1
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#define PCI_DEVICE_ID_INTEL_EHL_PSE0_SGMII2G5_ID 0x4ba2
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#define PCI_DEVICE_ID_INTEL_EHL_PSE1_RGMII1G_ID 0x4bb0
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#define PCI_DEVICE_ID_INTEL_EHL_PSE1_SGMII1G_ID 0x4bb1
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#define PCI_DEVICE_ID_INTEL_EHL_PSE1_SGMII2G5_ID 0x4bb2
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#define PCI_DEVICE_ID_INTEL_TGL_SGMII1G_ID 0xa0ac
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static const struct pci_device_id intel_eth_pci_id_table[] = {
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{ PCI_DEVICE_DATA(INTEL, QUARK_ID, &quark_pci_info) },
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{ PCI_DEVICE_DATA(INTEL, EHL_RGMII1G_ID, &ehl_rgmii1g_pci_info) },
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{ PCI_DEVICE_DATA(INTEL, EHL_SGMII1G_ID, &ehl_sgmii1g_pci_info) },
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{ PCI_DEVICE_DATA(INTEL, EHL_SGMII2G5_ID, &ehl_sgmii1g_pci_info) },
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{ PCI_DEVICE_DATA(INTEL, EHL_PSE0_RGMII1G_ID,
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&ehl_pse0_rgmii1g_pci_info) },
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{ PCI_DEVICE_DATA(INTEL, EHL_PSE0_SGMII1G_ID,
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&ehl_pse0_sgmii1g_pci_info) },
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{ PCI_DEVICE_DATA(INTEL, EHL_PSE0_SGMII2G5_ID,
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&ehl_pse0_sgmii1g_pci_info) },
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{ PCI_DEVICE_DATA(INTEL, EHL_PSE1_RGMII1G_ID,
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&ehl_pse1_rgmii1g_pci_info) },
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{ PCI_DEVICE_DATA(INTEL, EHL_PSE1_SGMII1G_ID,
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&ehl_pse1_sgmii1g_pci_info) },
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{ PCI_DEVICE_DATA(INTEL, EHL_PSE1_SGMII2G5_ID,
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&ehl_pse1_sgmii1g_pci_info) },
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{ PCI_DEVICE_DATA(INTEL, TGL_SGMII1G_ID, &tgl_sgmii1g_pci_info) },
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{}
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};
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