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crypto: arm/aes-scalar - switch to common rev_l/mov_l macros
The scalar AES implementation has some locally defined macros which reimplement things that are now available in macros defined in assembler.h. So let's switch to those. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Nicolas Pitre <nico@fluxnic.net> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Eric Biggers <ebiggers@google.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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@ -99,28 +99,6 @@
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__hround \out2, \out3, \in2, \in1, \in0, \in3, \in1, \in0, 0, \sz, \op, \oldcpsr
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.endm
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.macro __rev, out, in
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.if __LINUX_ARM_ARCH__ < 6
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lsl t0, \in, #24
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and t1, \in, #0xff00
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and t2, \in, #0xff0000
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orr \out, t0, \in, lsr #24
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orr \out, \out, t1, lsl #8
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orr \out, \out, t2, lsr #8
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.else
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rev \out, \in
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.endif
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.endm
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.macro __adrl, out, sym, c
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.if __LINUX_ARM_ARCH__ < 7
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ldr\c \out, =\sym
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.else
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movw\c \out, #:lower16:\sym
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movt\c \out, #:upper16:\sym
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.endif
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.endm
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.macro do_crypt, round, ttab, ltab, bsz
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push {r3-r11, lr}
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@ -133,10 +111,10 @@
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ldr r7, [in, #12]
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#ifdef CONFIG_CPU_BIG_ENDIAN
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__rev r4, r4
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__rev r5, r5
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__rev r6, r6
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__rev r7, r7
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rev_l r4, t0
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rev_l r5, t0
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rev_l r6, t0
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rev_l r7, t0
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#endif
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eor r4, r4, r8
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@ -144,7 +122,7 @@
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eor r6, r6, r10
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eor r7, r7, r11
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__adrl ttab, \ttab
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mov_l ttab, \ttab
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/*
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* Disable interrupts and prefetch the 1024-byte 'ft' or 'it' table into
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* L1 cache, assuming cacheline size >= 32. This is a hardening measure
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@ -180,7 +158,7 @@
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2: .ifb \ltab
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add ttab, ttab, #1
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.else
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__adrl ttab, \ltab
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mov_l ttab, \ltab
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// Prefetch inverse S-box for final round; see explanation above
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.set i, 0
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.rept 256 / 64
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@ -194,10 +172,10 @@
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\round r4, r5, r6, r7, r8, r9, r10, r11, \bsz, b, rounds
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#ifdef CONFIG_CPU_BIG_ENDIAN
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__rev r4, r4
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__rev r5, r5
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__rev r6, r6
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__rev r7, r7
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rev_l r4, t0
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rev_l r5, t0
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rev_l r6, t0
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rev_l r7, t0
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#endif
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ldr out, [sp]
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