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MIPS: ath25: register AR5312 flash controller

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AR5312 SoC flash controller maps the flash content to memory and
translates the memory access operations to the flash access operations.
Such controller is fully supported by the physmap-flash driver.

Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>R5312 SoC flash
Cc: Linux MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/8245/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Sergey Ryazanov 2014-10-29 03:18:46 +04:00 committed by Ralf Baechle
parent 1654861f6e
commit d58eaa7ffd
1 changed files with 36 additions and 2 deletions
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38
arch/mips/ath25/ar5312.c
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@ -19,6 +19,8 @@
#include <linux/bitops.h>
#include <linux/irqdomain.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
#include <linux/mtd/physmap.h>
#include <linux/reboot.h>
#include <asm/bootinfo.h>
#include <asm/reboot.h>
@ -160,6 +162,24 @@ void __init ar5312_arch_init_irq(void)
ar5312_misc_irq_domain = domain;
}
static struct physmap_flash_data ar5312_flash_data = {
.width = 2,
};
static struct resource ar5312_flash_resource = {
.start = AR5312_FLASH_BASE,
.end = AR5312_FLASH_BASE + AR5312_FLASH_SIZE - 1,
.flags = IORESOURCE_MEM,
};
static struct platform_device ar5312_physmap_flash = {
.name = "physmap-flash",
.id = 0,
.dev.platform_data = &ar5312_flash_data,
.resource = &ar5312_flash_resource,
.num_resources = 1,
};
static void __init ar5312_flash_init(void)
{
void __iomem *flashctl_base;
@ -168,12 +188,24 @@ static void __init ar5312_flash_init(void)
flashctl_base = ioremap_nocache(AR5312_FLASHCTL_BASE,
AR5312_FLASHCTL_SIZE);
ctl = __raw_readl(flashctl_base + AR5312_FLASHCTL0);
ctl &= AR5312_FLASHCTL_MW;
/* fixup flash width */
switch (ctl) {
case AR5312_FLASHCTL_MW16:
ar5312_flash_data.width = 2;
break;
case AR5312_FLASHCTL_MW8:
default:
ar5312_flash_data.width = 1;
break;
}
/*
* Configure flash bank 0.
* Assume 8M window size. Flash will be aliased if it's smaller
*/
ctl = __raw_readl(flashctl_base + AR5312_FLASHCTL0);
ctl &= AR5312_FLASHCTL_MW;
ctl |= AR5312_FLASHCTL_E | AR5312_FLASHCTL_AC_8M | AR5312_FLASHCTL_RBLE;
ctl |= 0x01 << AR5312_FLASHCTL_IDCY_S;
ctl |= 0x07 << AR5312_FLASHCTL_WST1_S;
@ -212,6 +244,8 @@ void __init ar5312_init_devices(void)
/* Everything else is probably AR5312 or compatible */
else
ath25_soc = ATH25_SOC_AR5312;
platform_device_register(&ar5312_physmap_flash);
}
static void ar5312_restart(char *command)