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Allwinner MBUS and DMA-ops rework

Browse Source 
The Allwinner SoCs have a number of high-bandwidth devices connected to
 a memory bus with a different RAM mapping than the CPU.
 
 This was addressed before through drivers setting the DMA offsets
 directly, and subsequently changed to calls to dma_direct_set_offset.
 However that wasn't really meant to be exported to modules (and thus
 drivers). The duplicated code also led to small inconsistencies across
 drivers in how we dealt with DT backward compatibility.
 
 Move all that DMA setup code into a platform bus notifier to share that
 code and remove the export on dma_direct_set_offset.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCX7TkmwAKCRDj7w1vZxhR
 xXhXAP4mzQvdsV0jN0LQARpAXDKNq/mSy2qGTRHf+2+MFd3XWQD+JwzMlrnSokf7
 Y8nH0YTaXJyu7iQohlM0kVQoKyo5mAw=
 =4KSg
 -----END PGP SIGNATURE-----

Merge tag 'sunxi-rework-mbus' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mripard/linux into arm/drivers

Allwinner MBUS and DMA-ops rework

The Allwinner SoCs have a number of high-bandwidth devices connected to
a memory bus with a different RAM mapping than the CPU.

This was addressed before through drivers setting the DMA offsets
directly, and subsequently changed to calls to dma_direct_set_offset.
However that wasn't really meant to be exported to modules (and thus
drivers). The duplicated code also led to small inconsistencies across
drivers in how we dealt with DT backward compatibility.

Move all that DMA setup code into a platform bus notifier to share that
code and remove the export on dma_direct_set_offset.

* tag 'sunxi-rework-mbus' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
  dma-mapping: remove the dma_direct_set_offset export
  media: sun8i-di: Remove the call to of_dma_configure
  media: cedrus: Remove the MBUS quirks
  media: sun6i: Remove the MBUS quirks
  media: sun4i: Remove the MBUS quirks
  drm/sun4i: backend: Remove the MBUS quirks
  soc: sunxi: Deal with the MBUS DMA offsets in a central place
  drm/sun4i: backend: Fix probe failure with multiple backends

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2020-11-23 17:20:46 +01:00
commit d4f97711b3
17 changed files with 149 additions and 95 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/mach-keystone/keystone.c
View File

@ -8,7 +8,7 @@
*/
#include <linux/io.h>
#include <linux/of.h>
#include <linux/dma-mapping.h>
#include <linux/dma-map-ops.h>
#include <linux/init.h>
#include <linux/of_platform.h>
#include <linux/of_address.h>

2
arch/arm/mach-omap1/usb.c
View File

@ -9,7 +9,7 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>
#include <linux/dma-map-ops.h>
#include <linux/io.h>
#include <asm/irq.h>

2
arch/sh/drivers/pci/pcie-sh7786.c
View File

@ -12,7 +12,7 @@
#include <linux/io.h>
#include <linux/async.h>
#include <linux/delay.h>
#include <linux/dma-mapping.h>
#include <linux/dma-map-ops.h>
#include <linux/slab.h>
#include <linux/clk.h>
#include <linux/sh_clk.h>

3
arch/x86/pci/sta2x11-fixup.c
View File

@ -11,7 +11,8 @@
#include <linux/pci_ids.h>
#include <linux/export.h>
#include <linux/list.h>
#include <linux/dma-direct.h>
#include <linux/dma-map-ops.h>
#include <linux/swiotlb.h>
#include <asm/iommu.h>
#define STA2X11_SWIOTLB_SIZE (4*1024*1024)

13
drivers/gpu/drm/sun4i/sun4i_backend.c
View File

@ -805,19 +805,6 @@ static int sun4i_backend_bind(struct device *dev, struct device *master,
ret = of_dma_configure(drm->dev, dev->of_node, true);
if (ret)
return ret;
} else {
/*
* If we don't have the interconnect property, most likely
* because of an old DT, we need to set the DMA offset by hand
* on our device since the RAM mapping is at 0 for the DMA bus,
* unlike the CPU.
*
* XXX(hch): this has no business in a driver and needs to move
* to the device tree.
*/
ret = dma_direct_set_offset(drm->dev, PHYS_OFFSET, 0, SZ_4G);
if (ret)
return ret;
}
backend->engine.node = dev->of_node;

27
drivers/media/platform/sunxi/sun4i-csi/sun4i_csi.c
View File

@ -167,33 +167,6 @@ static int sun4i_csi_probe(struct platform_device *pdev)
if (!csi->traits)
return -EINVAL;
/*
* On Allwinner SoCs, some high memory bandwidth devices do DMA
* directly over the memory bus (called MBUS), instead of the
* system bus. The memory bus has a different addressing scheme
* without the DRAM starting offset.
*
* In some cases this can be described by an interconnect in
* the device tree. In other cases where the hardware is not
* fully understood and the interconnect is left out of the
* device tree, fall back to a default offset.
*/
if (of_find_property(csi->dev->of_node, "interconnects", NULL)) {
ret = of_dma_configure(csi->dev, csi->dev->of_node, true);
if (ret)
return ret;
} else {
/*
* XXX(hch): this has no business in a driver and needs to move
* to the device tree.
*/
#ifdef PHYS_PFN_OFFSET
ret = dma_direct_set_offset(csi->dev, PHYS_OFFSET, 0, SZ_4G);
if (ret)
return ret;
#endif
}
csi->mdev.dev = csi->dev;
strscpy(csi->mdev.model, "Allwinner Video Capture Device",
sizeof(csi->mdev.model));

17
drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c
View File

@ -881,14 +881,6 @@ static int sun6i_csi_resource_request(struct sun6i_csi_dev *sdev,
return 0;
}
/*
* PHYS_OFFSET isn't available on all architectures. In order to
* accommodate for COMPILE_TEST, let's define it to something dumb.
*/
#if defined(CONFIG_COMPILE_TEST) && !defined(PHYS_OFFSET)
#define PHYS_OFFSET 0
#endif
static int sun6i_csi_probe(struct platform_device *pdev)
{
struct sun6i_csi_dev *sdev;
@ -899,15 +891,6 @@ static int sun6i_csi_probe(struct platform_device *pdev)
return -ENOMEM;
sdev->dev = &pdev->dev;
/*
* The DMA bus has the memory mapped at 0.
*
* XXX(hch): this has no business in a driver and needs to move
* to the device tree.
*/
ret = dma_direct_set_offset(sdev->dev, PHYS_OFFSET, 0, SZ_4G);
if (ret)
return ret;
ret = sun6i_csi_resource_request(sdev, pdev);
if (ret)

4
drivers/media/platform/sunxi/sun8i-di/sun8i-di.c
View File

@ -825,10 +825,6 @@ static int deinterlace_probe(struct platform_device *pdev)
return ret;
}
ret = of_dma_configure(dev->dev, dev->dev->of_node, true);
if (ret)
return ret;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
dev->base = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(dev->base))

8
drivers/soc/sunxi/Kconfig
View File

@ -2,6 +2,14 @@
#
# Allwinner sunXi SoC drivers
#
config SUNXI_MBUS
bool
default ARCH_SUNXI
help
Say y to enable the fixups needed to support the Allwinner
MBUS DMA quirks.
config SUNXI_SRAM
bool
default ARCH_SUNXI

1
drivers/soc/sunxi/Makefile
View File

@ -1,2 +1,3 @@
# SPDX-License-Identifier: GPL-2.0-only
obj-$(CONFIG_SUNXI_MBUS) += sunxi_mbus.o
obj-$(CONFIG_SUNXI_SRAM) += sunxi_sram.o

132
drivers/soc/sunxi/sunxi_mbus.c Normal file
View File

@ -0,0 +1,132 @@
// SPDX-License-Identifier: GPL-2.0
/* Copyright (C) 2020 Maxime Ripard <maxime@cerno.tech> */
#include <linux/device.h>
#include <linux/dma-mapping.h>
#include <linux/init.h>
#include <linux/notifier.h>
#include <linux/of.h>
#include <linux/platform_device.h>
static const char * const sunxi_mbus_devices[] = {
/*
* The display engine virtual devices are not strictly speaking
* connected to the MBUS, but since DRM will perform all the
* memory allocations and DMA operations through that device, we
* need to have the quirk on those devices too.
*/
"allwinner,sun4i-a10-display-engine",
"allwinner,sun5i-a10s-display-engine",
"allwinner,sun5i-a13-display-engine",
"allwinner,sun6i-a31-display-engine",
"allwinner,sun6i-a31s-display-engine",
"allwinner,sun7i-a20-display-engine",
"allwinner,sun8i-a23-display-engine",
"allwinner,sun8i-a33-display-engine",
"allwinner,sun8i-a83t-display-engine",
"allwinner,sun8i-h3-display-engine",
"allwinner,sun8i-r40-display-engine",
"allwinner,sun8i-v3s-display-engine",
"allwinner,sun9i-a80-display-engine",
"allwinner,sun50i-a64-display-engine",
/*
* And now we have the regular devices connected to the MBUS
* (that we know of).
*/
"allwinner,sun4i-a10-csi1",
"allwinner,sun4i-a10-display-backend",
"allwinner,sun4i-a10-display-frontend",
"allwinner,sun4i-a10-video-engine",
"allwinner,sun5i-a13-display-backend",
"allwinner,sun5i-a13-video-engine",
"allwinner,sun6i-a31-csi",
"allwinner,sun6i-a31-display-backend",
"allwinner,sun7i-a20-csi0",
"allwinner,sun7i-a20-display-backend",
"allwinner,sun7i-a20-display-frontend",
"allwinner,sun7i-a20-video-engine",
"allwinner,sun8i-a23-display-backend",
"allwinner,sun8i-a23-display-frontend",
"allwinner,sun8i-a33-display-backend",
"allwinner,sun8i-a33-display-frontend",
"allwinner,sun8i-a33-video-engine",
"allwinner,sun8i-a83t-csi",
"allwinner,sun8i-h3-csi",
"allwinner,sun8i-h3-video-engine",
"allwinner,sun8i-v3s-csi",
"allwinner,sun9i-a80-display-backend",
"allwinner,sun50i-a64-csi",
"allwinner,sun50i-a64-video-engine",
"allwinner,sun50i-h5-video-engine",
NULL,
};
static int sunxi_mbus_notifier(struct notifier_block *nb,
unsigned long event, void *__dev)
{
struct device *dev = __dev;
int ret;
if (event != BUS_NOTIFY_ADD_DEVICE)
return NOTIFY_DONE;
/*
* Only the devices that need a large memory bandwidth do DMA
* directly over the memory bus (called MBUS), instead of going
* through the regular system bus.
*/
if (!of_device_compatible_match(dev->of_node, sunxi_mbus_devices))
return NOTIFY_DONE;
/*
* Devices with an interconnects property have the MBUS
* relationship described in their DT and dealt with by
* of_dma_configure, so we can just skip them.
*
* Older DTs or SoCs who are not clearly understood need to set
* that DMA offset though.
*/
if (of_find_property(dev->of_node, "interconnects", NULL))
return NOTIFY_DONE;
ret = dma_direct_set_offset(dev, PHYS_OFFSET, 0, SZ_4G);
if (ret)
dev_err(dev, "Couldn't setup our DMA offset: %d\n", ret);
return NOTIFY_DONE;
}
static struct notifier_block sunxi_mbus_nb = {
.notifier_call = sunxi_mbus_notifier,
};
static const char * const sunxi_mbus_platforms[] __initconst = {
"allwinner,sun4i-a10",
"allwinner,sun5i-a10s",
"allwinner,sun5i-a13",
"allwinner,sun6i-a31",
"allwinner,sun7i-a20",
"allwinner,sun8i-a23",
"allwinner,sun8i-a33",
"allwinner,sun8i-a83t",
"allwinner,sun8i-h3",
"allwinner,sun8i-r40",
"allwinner,sun8i-v3",
"allwinner,sun8i-v3s",
"allwinner,sun9i-a80",
"allwinner,sun50i-a64",
"allwinner,sun50i-h5",
"nextthing,gr8",
NULL,
};
static int __init sunxi_mbus_init(void)
{
if (!of_device_compatible_match(of_root, sunxi_mbus_platforms))
return 0;
bus_register_notifier(&platform_bus_type, &sunxi_mbus_nb);
return 0;
}
arch_initcall(sunxi_mbus_init);

1
drivers/staging/media/sunxi/cedrus/cedrus.c
View File

@ -523,7 +523,6 @@ static const struct cedrus_variant sun50i_h5_cedrus_variant = {
static const struct cedrus_variant sun50i_h6_cedrus_variant = {
.capabilities = CEDRUS_CAPABILITY_UNTILED |
CEDRUS_CAPABILITY_H265_DEC,
.quirks = CEDRUS_QUIRK_NO_DMA_OFFSET,
.mod_rate = 600000000,
};

3
drivers/staging/media/sunxi/cedrus/cedrus.h
View File

@ -29,8 +29,6 @@
#define CEDRUS_CAPABILITY_UNTILED BIT(0)
#define CEDRUS_CAPABILITY_H265_DEC BIT(1)
#define CEDRUS_QUIRK_NO_DMA_OFFSET BIT(0)
enum cedrus_codec {
CEDRUS_CODEC_MPEG2,
CEDRUS_CODEC_H264,
@ -150,7 +148,6 @@ struct cedrus_dec_ops {
struct cedrus_variant {
unsigned int capabilities;
unsigned int quirks;
unsigned int mod_rate;
};

18
drivers/staging/media/sunxi/cedrus/cedrus_hw.c
View File

@ -222,24 +222,6 @@ int cedrus_hw_probe(struct cedrus_dev *dev)
return ret;
}
/*
* The VPU is only able to handle bus addresses so we have to subtract
* the RAM offset to the physcal addresses.
*
* This information will eventually be obtained from device-tree.
*
* XXX(hch): this has no business in a driver and needs to move
* to the device tree.
*/
#ifdef PHYS_PFN_OFFSET
if (!(variant->quirks & CEDRUS_QUIRK_NO_DMA_OFFSET)) {
ret = dma_direct_set_offset(dev->dev, PHYS_OFFSET, 0, SZ_4G);
if (ret)
return ret;
}
#endif
ret = of_reserved_mem_device_init(dev->dev);
if (ret && ret != -ENODEV) {
dev_err(dev->dev, "Failed to reserve memory\n");

3
include/linux/dma-map-ops.h
View File

@ -226,6 +226,9 @@ struct page *dma_alloc_from_pool(struct device *dev, size_t size,
bool (*phys_addr_ok)(struct device *, phys_addr_t, size_t));
bool dma_free_from_pool(struct device *dev, void *start, size_t size);
int dma_direct_set_offset(struct device *dev, phys_addr_t cpu_start,
dma_addr_t dma_start, u64 size);
#ifdef CONFIG_ARCH_HAS_DMA_COHERENCE_H
#include <asm/dma-coherence.h>
#elif defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE) || \

7
include/linux/dma-mapping.h
View File

@ -558,13 +558,6 @@ static inline int dma_mmap_wc(struct device *dev,
#define dma_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
#endif
/*
* Legacy interface to set up the dma offset map. Drivers really should not
* actually use it, but we have a few legacy cases left.
*/
int dma_direct_set_offset(struct device *dev, phys_addr_t cpu_start,
dma_addr_t dma_start, u64 size);
extern const struct dma_map_ops dma_virt_ops;
#endif /* _LINUX_DMA_MAPPING_H */

1
kernel/dma/direct.c
View File

@ -547,4 +547,3 @@ int dma_direct_set_offset(struct device *dev, phys_addr_t cpu_start,
dev->dma_range_map = map;
return 0;
}
EXPORT_SYMBOL_GPL(dma_direct_set_offset);