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Merge master.kernel.org:/home/rmk/linux-2.6-serial

Browse Source 
* master.kernel.org:/home/rmk/linux-2.6-serial:
  [SERIAL] Provide Cirrus EP93xx AMBA PL010 serial support.
  [SERIAL] amba-pl010: allow platforms to specify modem control method
  [SERIAL] Remove obsoleted au1x00_uart driver
  [SERIAL] Small time UART configuration fix for AU1100 processor
This commit is contained in:
Linus Torvalds 2006-03-28 13:52:37 -08:00
commit d4965b3e2f
10 changed files with 190 additions and 1483 deletions
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68
arch/arm/mach-ep93xx/core.c
View File

@ -30,7 +30,9 @@
#include <linux/time.h>
#include <linux/timex.h>
#include <linux/delay.h>
#include <linux/termios.h>
#include <linux/amba/bus.h>
#include <linux/amba/serial.h>
#include <asm/types.h>
#include <asm/setup.h>
@ -360,6 +362,68 @@ void __init ep93xx_init_irq(void)
/*************************************************************************
* EP93xx peripheral handling
*************************************************************************/
#define EP93XX_UART_MCR_OFFSET (0x0100)
static void ep93xx_uart_set_mctrl(struct amba_device *dev,
void __iomem *base, unsigned int mctrl)
{
unsigned int mcr;
mcr = 0;
if (!(mctrl & TIOCM_RTS))
mcr |= 2;
if (!(mctrl & TIOCM_DTR))
mcr |= 1;
__raw_writel(mcr, base + EP93XX_UART_MCR_OFFSET);
}
static struct amba_pl010_data ep93xx_uart_data = {
.set_mctrl = ep93xx_uart_set_mctrl,
};
static struct amba_device uart1_device = {
.dev = {
.bus_id = "apb:uart1",
.platform_data = &ep93xx_uart_data,
},
.res = {
.start = EP93XX_UART1_PHYS_BASE,
.end = EP93XX_UART1_PHYS_BASE + 0x0fff,
.flags = IORESOURCE_MEM,
},
.irq = { IRQ_EP93XX_UART1, NO_IRQ },
.periphid = 0x00041010,
};
static struct amba_device uart2_device = {
.dev = {
.bus_id = "apb:uart2",
.platform_data = &ep93xx_uart_data,
},
.res = {
.start = EP93XX_UART2_PHYS_BASE,
.end = EP93XX_UART2_PHYS_BASE + 0x0fff,
.flags = IORESOURCE_MEM,
},
.irq = { IRQ_EP93XX_UART2, NO_IRQ },
.periphid = 0x00041010,
};
static struct amba_device uart3_device = {
.dev = {
.bus_id = "apb:uart3",
.platform_data = &ep93xx_uart_data,
},
.res = {
.start = EP93XX_UART3_PHYS_BASE,
.end = EP93XX_UART3_PHYS_BASE + 0x0fff,
.flags = IORESOURCE_MEM,
},
.irq = { IRQ_EP93XX_UART3, NO_IRQ },
.periphid = 0x00041010,
};
void __init ep93xx_init_devices(void)
{
unsigned int v;
@ -371,4 +435,8 @@ void __init ep93xx_init_devices(void)
v &= ~EP93XX_SYSCON_DEVICE_CONFIG_CRUNCH_ENABLE;
__raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
__raw_writel(v, EP93XX_SYSCON_DEVICE_CONFIG);
amba_device_register(&uart1_device, &iomem_resource);
amba_device_register(&uart2_device, &iomem_resource);
amba_device_register(&uart3_device, &iomem_resource);
}

46
arch/arm/mach-integrator/core.c
View File

@ -15,7 +15,9 @@
#include <linux/interrupt.h>
#include <linux/sched.h>
#include <linux/smp.h>
#include <linux/termios.h>
#include <linux/amba/bus.h>
#include <linux/amba/serial.h>
#include <asm/hardware.h>
#include <asm/irq.h>
@ -28,6 +30,8 @@
#include "common.h"
static struct amba_pl010_data integrator_uart_data;
static struct amba_device rtc_device = {
.dev = {
.bus_id = "mb:15",
@ -44,6 +48,7 @@ static struct amba_device rtc_device = {
static struct amba_device uart0_device = {
.dev = {
.bus_id = "mb:16",
.platform_data = &integrator_uart_data,
},
.res = {
.start = INTEGRATOR_UART0_BASE,
@ -57,6 +62,7 @@ static struct amba_device uart0_device = {
static struct amba_device uart1_device = {
.dev = {
.bus_id = "mb:17",
.platform_data = &integrator_uart_data,
},
.res = {
.start = INTEGRATOR_UART1_BASE,
@ -115,6 +121,46 @@ static int __init integrator_init(void)
arch_initcall(integrator_init);
/*
* On the Integrator platform, the port RTS and DTR are provided by
* bits in the following SC_CTRLS register bits:
* RTS DTR
* UART0 7 6
* UART1 5 4
*/
#define SC_CTRLC (IO_ADDRESS(INTEGRATOR_SC_BASE) + INTEGRATOR_SC_CTRLC_OFFSET)
#define SC_CTRLS (IO_ADDRESS(INTEGRATOR_SC_BASE) + INTEGRATOR_SC_CTRLS_OFFSET)
static void integrator_uart_set_mctrl(struct amba_device *dev, void __iomem *base, unsigned int mctrl)
{
unsigned int ctrls = 0, ctrlc = 0, rts_mask, dtr_mask;
if (dev == &uart0_device) {
rts_mask = 1 << 4;
dtr_mask = 1 << 5;
} else {
rts_mask = 1 << 6;
dtr_mask = 1 << 7;
}
if (mctrl & TIOCM_RTS)
ctrlc |= rts_mask;
else
ctrls |= rts_mask;
if (mctrl & TIOCM_DTR)
ctrlc |= dtr_mask;
else
ctrls |= dtr_mask;
__raw_writel(ctrls, SC_CTRLS);
__raw_writel(ctrlc, SC_CTRLC);
}
static struct amba_pl010_data integrator_uart_data = {
.set_mctrl = integrator_uart_set_mctrl,
};
#define CM_CTRL IO_ADDRESS(INTEGRATOR_HDR_BASE) + INTEGRATOR_HDR_CTRL_OFFSET
static DEFINE_SPINLOCK(cm_lock);

2
arch/mips/au1000/common/setup.c
View File

@ -94,7 +94,7 @@ void __init plat_setup(void)
argptr = prom_getcmdline();
#if defined(CONFIG_SERIAL_AU1X00_CONSOLE) || defined(CONFIG_SERIAL_8250_CONSOLE)
#ifdef CONFIG_SERIAL_8250_CONSOLE
if ((argptr = strstr(argptr, "console=")) == NULL) {
argptr = prom_getcmdline();
strcat(argptr, " console=ttyS0,115200");

2
drivers/serial/8250_au1x00.c
View File

@ -51,7 +51,7 @@ static struct plat_serial8250_port au1x00_data[] = {
#elif defined(CONFIG_SOC_AU1100)
PORT(UART0_ADDR, AU1100_UART0_INT),
PORT(UART1_ADDR, AU1100_UART1_INT),
PORT(UART2_ADDR, AU1100_UART2_INT),
/* The internal UART2 does not exist on the AU1100 processor. */
PORT(UART3_ADDR, AU1100_UART3_INT),
#elif defined(CONFIG_SOC_AU1550)
PORT(UART0_ADDR, AU1550_UART0_INT),

16
drivers/serial/Kconfig
View File

@ -620,22 +620,6 @@ config SERIAL_SH_SCI_CONSOLE
depends on SERIAL_SH_SCI=y
select SERIAL_CORE_CONSOLE
config SERIAL_AU1X00
bool "Enable Au1x00 UART Support"
depends on MIPS && SOC_AU1X00
select SERIAL_CORE
help
If you have an Alchemy AU1X00 processor (MIPS based) and you want
to use serial ports, say Y. Otherwise, say N.
config SERIAL_AU1X00_CONSOLE
bool "Enable Au1x00 serial console"
depends on SERIAL_AU1X00
select SERIAL_CORE_CONSOLE
help
If you have an Alchemy AU1X00 processor (MIPS based) and you want
to use a console on a serial port, say Y. Otherwise, say N.
config SERIAL_CORE
tristate

1
drivers/serial/Makefile
View File

@ -41,7 +41,6 @@ obj-$(CONFIG_SERIAL_COLDFIRE) += mcfserial.o
obj-$(CONFIG_V850E_UART) += v850e_uart.o
obj-$(CONFIG_SERIAL_PMACZILOG) += pmac_zilog.o
obj-$(CONFIG_SERIAL_LH7A40X) += serial_lh7a40x.o
obj-$(CONFIG_SERIAL_AU1X00) += au1x00_uart.o
obj-$(CONFIG_SERIAL_DZ) += dz.o
obj-$(CONFIG_SERIAL_SH_SCI) += sh-sci.o
obj-$(CONFIG_SERIAL_SGI_L1_CONSOLE) += sn_console.o

160
drivers/serial/amba-pl010.c
View File

@ -51,8 +51,6 @@
#include <linux/amba/serial.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/hardware.h>
#define UART_NR 2
@ -65,26 +63,16 @@
#define UART_RX_DATA(s) (((s) & UART01x_FR_RXFE) == 0)
#define UART_TX_READY(s) (((s) & UART01x_FR_TXFF) == 0)
#define UART_DUMMY_RSR_RX /*256*/0
#define UART_DUMMY_RSR_RX 256
#define UART_PORT_SIZE 64
/*
* On the Integrator platform, the port RTS and DTR are provided by
* bits in the following SC_CTRLS register bits:
* RTS DTR
* UART0 7 6
* UART1 5 4
*/
#define SC_CTRLC (IO_ADDRESS(INTEGRATOR_SC_BASE) + INTEGRATOR_SC_CTRLC_OFFSET)
#define SC_CTRLS (IO_ADDRESS(INTEGRATOR_SC_BASE) + INTEGRATOR_SC_CTRLS_OFFSET)
/*
* We wrap our port structure around the generic uart_port.
*/
struct uart_amba_port {
struct uart_port port;
unsigned int dtr_mask;
unsigned int rts_mask;
struct amba_device *dev;
struct amba_pl010_data *data;
unsigned int old_status;
};
@ -300,20 +288,9 @@ static unsigned int pl010_get_mctrl(struct uart_port *port)
static void pl010_set_mctrl(struct uart_port *port, unsigned int mctrl)
{
struct uart_amba_port *uap = (struct uart_amba_port *)port;
unsigned int ctrls = 0, ctrlc = 0;
if (mctrl & TIOCM_RTS)
ctrlc |= uap->rts_mask;
else
ctrls |= uap->rts_mask;
if (mctrl & TIOCM_DTR)
ctrlc |= uap->dtr_mask;
else
ctrls |= uap->dtr_mask;
__raw_writel(ctrls, SC_CTRLS);
__raw_writel(ctrlc, SC_CTRLC);
if (uap->data)
uap->data->set_mctrl(uap->dev, uap->port.membase, mctrl);
}
static void pl010_break_ctl(struct uart_port *port, int break_state)
@ -539,38 +516,7 @@ static struct uart_ops amba_pl010_pops = {
.verify_port = pl010_verify_port,
};
static struct uart_amba_port amba_ports[UART_NR] = {
{
.port = {
.membase = (void *)IO_ADDRESS(INTEGRATOR_UART0_BASE),
.mapbase = INTEGRATOR_UART0_BASE,
.iotype = UPIO_MEM,
.irq = IRQ_UARTINT0,
.uartclk = 14745600,
.fifosize = 16,
.ops = &amba_pl010_pops,
.flags = UPF_BOOT_AUTOCONF,
.line = 0,
},
.dtr_mask = 1 << 5,
.rts_mask = 1 << 4,
},
{
.port = {
.membase = (void *)IO_ADDRESS(INTEGRATOR_UART1_BASE),
.mapbase = INTEGRATOR_UART1_BASE,
.iotype = UPIO_MEM,
.irq = IRQ_UARTINT1,
.uartclk = 14745600,
.fifosize = 16,
.ops = &amba_pl010_pops,
.flags = UPF_BOOT_AUTOCONF,
.line = 1,
},
.dtr_mask = 1 << 7,
.rts_mask = 1 << 6,
}
};
static struct uart_amba_port *amba_ports[UART_NR];
#ifdef CONFIG_SERIAL_AMBA_PL010_CONSOLE
@ -588,7 +534,7 @@ static void pl010_console_putchar(struct uart_port *port, int ch)
static void
pl010_console_write(struct console *co, const char *s, unsigned int count)
{
struct uart_port *port = &amba_ports[co->index].port;
struct uart_port *port = &amba_ports[co->index]->port;
unsigned int status, old_cr;
/*
@ -651,7 +597,7 @@ static int __init pl010_console_setup(struct console *co, char *options)
*/
if (co->index >= UART_NR)
co->index = 0;
port = &amba_ports[co->index].port;
port = &amba_ports[co->index]->port;
if (options)
uart_parse_options(options, &baud, &parity, &bits, &flow);
@ -672,24 +618,6 @@ static struct console amba_console = {
.data = &amba_reg,
};
static int __init amba_console_init(void)
{
/*
* All port initializations are done statically
*/
register_console(&amba_console);
return 0;
}
console_initcall(amba_console_init);
static int __init amba_late_console_init(void)
{
if (!(amba_console.flags & CON_ENABLED))
register_console(&amba_console);
return 0;
}
late_initcall(amba_late_console_init);
#define AMBA_CONSOLE &amba_console
#else
#define AMBA_CONSOLE NULL
@ -707,30 +635,76 @@ static struct uart_driver amba_reg = {
static int pl010_probe(struct amba_device *dev, void *id)
{
int i;
struct uart_amba_port *port;
void __iomem *base;
int i, ret;
for (i = 0; i < UART_NR; i++) {
if (amba_ports[i].port.mapbase != dev->res.start)
continue;
for (i = 0; i < ARRAY_SIZE(amba_ports); i++)
if (amba_ports[i] == NULL)
break;
amba_ports[i].port.dev = &dev->dev;
uart_add_one_port(&amba_reg, &amba_ports[i].port);
amba_set_drvdata(dev, &amba_ports[i]);
break;
if (i == ARRAY_SIZE(amba_ports)) {
ret = -EBUSY;
goto out;
}
return 0;
port = kzalloc(sizeof(struct uart_amba_port), GFP_KERNEL);
if (!port) {
ret = -ENOMEM;
goto out;
}
base = ioremap(dev->res.start, PAGE_SIZE);
if (!base) {
ret = -ENOMEM;
goto free;
}
port->port.dev = &dev->dev;
port->port.mapbase = dev->res.start;
port->port.membase = base;
port->port.iotype = UPIO_MEM;
port->port.irq = dev->irq[0];
port->port.uartclk = 14745600;
port->port.fifosize = 16;
port->port.ops = &amba_pl010_pops;
port->port.flags = UPF_BOOT_AUTOCONF;
port->port.line = i;
port->dev = dev;
port->data = dev->dev.platform_data;
amba_ports[i] = port;
amba_set_drvdata(dev, port);
ret = uart_add_one_port(&amba_reg, &port->port);
if (ret) {
amba_set_drvdata(dev, NULL);
amba_ports[i] = NULL;
iounmap(base);
free:
kfree(port);
}
out:
return ret;
}
static int pl010_remove(struct amba_device *dev)
{
struct uart_amba_port *uap = amba_get_drvdata(dev);
if (uap)
uart_remove_one_port(&amba_reg, &uap->port);
struct uart_amba_port *port = amba_get_drvdata(dev);
int i;
amba_set_drvdata(dev, NULL);
uart_remove_one_port(&amba_reg, &port->port);
for (i = 0; i < ARRAY_SIZE(amba_ports); i++)
if (amba_ports[i] == port)
amba_ports[i] = NULL;
iounmap(port->port.membase);
kfree(port);
return 0;
}

1287
drivers/serial/au1x00_uart.c
View File

File diff suppressed because it is too large Load Diff

85
include/asm-mips/serial.h
View File

@ -103,88 +103,6 @@
#define IVR_SERIAL_PORT_DEFNS
#endif
#ifdef CONFIG_SERIAL_AU1X00
#include <asm/mach-au1x00/au1000.h>
#ifdef CONFIG_SOC_AU1000
#define AU1000_SERIAL_PORT_DEFNS \
{ .baud_base = 0, .port = UART0_ADDR, \
.iomem_base = (unsigned char *)UART0_ADDR, \
.irq = AU1000_UART0_INT, .flags = STD_COM_FLAGS, \
.iomem_reg_shift = 2 }, \
{ .baud_base = 0, .port = UART1_ADDR, \
.iomem_base = (unsigned char *)UART1_ADDR, \
.irq = AU1000_UART1_INT, .flags = STD_COM_FLAGS, \
.iomem_reg_shift = 2 }, \
{ .baud_base = 0, .port = UART2_ADDR, \
.iomem_base = (unsigned char *)UART2_ADDR, \
.irq = AU1000_UART2_INT, .flags = STD_COM_FLAGS, \
.iomem_reg_shift = 2 }, \
{ .baud_base = 0, .port = UART3_ADDR, \
.iomem_base = (unsigned char *)UART3_ADDR, \
.irq = AU1000_UART3_INT, .flags = STD_COM_FLAGS, \
.iomem_reg_shift = 2 },
#endif
#ifdef CONFIG_SOC_AU1500
#define AU1000_SERIAL_PORT_DEFNS \
{ .baud_base = 0, .port = UART0_ADDR, \
.iomem_base = (unsigned char *)UART0_ADDR, \
.irq = AU1500_UART0_INT, .flags = STD_COM_FLAGS, \
.iomem_reg_shift = 2 }, \
{ .baud_base = 0, .port = UART3_ADDR, \
.iomem_base = (unsigned char *)UART3_ADDR, \
.irq = AU1500_UART3_INT, .flags = STD_COM_FLAGS, \
.iomem_reg_shift = 2 },
#endif
#ifdef CONFIG_SOC_AU1100
#define AU1000_SERIAL_PORT_DEFNS \
{ .baud_base = 0, .port = UART0_ADDR, \
.iomem_base = (unsigned char *)UART0_ADDR, \
.irq = AU1100_UART0_INT, .flags = STD_COM_FLAGS, \
.iomem_reg_shift = 2 }, \
{ .baud_base = 0, .port = UART1_ADDR, \
.iomem_base = (unsigned char *)UART1_ADDR, \
.irq = AU1100_UART1_INT, .flags = STD_COM_FLAGS, \
.iomem_reg_shift = 2 }, \
{ .baud_base = 0, .port = UART3_ADDR, \
.iomem_base = (unsigned char *)UART3_ADDR, \
.irq = AU1100_UART3_INT, .flags = STD_COM_FLAGS, \
.iomem_reg_shift = 2 },
#endif
#ifdef CONFIG_SOC_AU1550
#define AU1000_SERIAL_PORT_DEFNS \
{ .baud_base = 0, .port = UART0_ADDR, \
.iomem_base = (unsigned char *)UART0_ADDR, \
.irq = AU1550_UART0_INT, .flags = STD_COM_FLAGS, \
.iomem_reg_shift = 2 }, \
{ .baud_base = 0, .port = UART1_ADDR, \
.iomem_base = (unsigned char *)UART1_ADDR, \
.irq = AU1550_UART1_INT, .flags = STD_COM_FLAGS, \
.iomem_reg_shift = 2 }, \
{ .baud_base = 0, .port = UART3_ADDR, \
.iomem_base = (unsigned char *)UART3_ADDR, \
.irq = AU1550_UART3_INT, .flags = STD_COM_FLAGS,\
.iomem_reg_shift = 2 },
#endif
#ifdef CONFIG_SOC_AU1200
#define AU1000_SERIAL_PORT_DEFNS \
{ .baud_base = 0, .port = UART0_ADDR, \
.iomem_base = (unsigned char *)UART0_ADDR, \
.irq = AU1200_UART0_INT, .flags = STD_COM_FLAGS, \
.iomem_reg_shift = 2 }, \
{ .baud_base = 0, .port = UART1_ADDR, \
.iomem_base = (unsigned char *)UART1_ADDR, \
.irq = AU1200_UART1_INT, .flags = STD_COM_FLAGS, \
.iomem_reg_shift = 2 },
#endif
#else
#define AU1000_SERIAL_PORT_DEFNS
#endif
#ifdef CONFIG_HAVE_STD_PC_SERIAL_PORT
#define STD_SERIAL_PORT_DEFNS \
/* UART CLK PORT IRQ FLAGS */ \
@ -331,7 +249,6 @@
MOMENCO_OCELOT_G_SERIAL_PORT_DEFNS \
MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS \
MOMENCO_OCELOT_SERIAL_PORT_DEFNS \
MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS \
AU1000_SERIAL_PORT_DEFNS
MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS
#endif /* _ASM_SERIAL_H */

6
include/linux/amba/serial.h
View File

@ -158,4 +158,10 @@
#define UART01x_RSR_ANY (UART01x_RSR_OE|UART01x_RSR_BE|UART01x_RSR_PE|UART01x_RSR_FE)
#define UART01x_FR_MODEM_ANY (UART01x_FR_DCD|UART01x_FR_DSR|UART01x_FR_CTS)
#ifndef __ASSEMBLY__
struct amba_pl010_data {
void (*set_mctrl)(struct amba_device *dev, void __iomem *base, unsigned int mctrl);
};
#endif
#endif