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net: dsa: realtek: rtl8365mb: add RTL8367S support
Realtek's RTL8367S, a 5+2 port 10/100/1000M Ethernet switch. It shares the same driver family (RTL8367C) with other models as the RTL8365MB-VC. Its compatible string is "realtek,rtl8367s". It was tested only with MDIO interface (realtek-mdio), although it might work out-of-the-box with SMI interface (using realtek-smi). This patch was based on an unpublished patch from Alvin Šipraga <alsi@bang-olufsen.dk>. Signed-off-by: Luiz Angelo Daros de Luca <luizluca@gmail.com> Tested-by: Arınç ÜNAL <arinc.unal@arinc9.com> Reviewed-by: Alvin Šipraga <alsi@bang-olufsen.dk> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -32,7 +32,7 @@ config NET_DSA_REALTEK_RTL8365MB
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depends on NET_DSA_REALTEK_SMI || NET_DSA_REALTEK_MDIO
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select NET_DSA_TAG_RTL8_4
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help
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Select to enable support for Realtek RTL8365MB
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Select to enable support for Realtek RTL8365MB-VC and RTL8367S.
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config NET_DSA_REALTEK_RTL8366RB
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tristate "Realtek RTL8366RB switch subdriver"
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@ -206,6 +206,7 @@ static const struct of_device_id realtek_mdio_of_match[] = {
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#endif
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#if IS_ENABLED(CONFIG_NET_DSA_REALTEK_RTL8365MB)
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{ .compatible = "realtek,rtl8365mb", .data = &rtl8365mb_variant, },
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{ .compatible = "realtek,rtl8367s", .data = &rtl8365mb_variant, },
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#endif
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{ /* sentinel */ },
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};
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@ -510,6 +510,10 @@ static const struct of_device_id realtek_smi_of_match[] = {
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.compatible = "realtek,rtl8365mb",
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.data = &rtl8365mb_variant,
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},
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{
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.compatible = "realtek,rtl8367s",
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.data = &rtl8365mb_variant,
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},
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#endif
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{ /* sentinel */ },
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};
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@ -102,15 +102,22 @@
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#include "realtek.h"
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/* Chip-specific data and limits */
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#define RTL8365MB_CHIP_ID_8365MB_VC 0x6367
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#define RTL8365MB_LEARN_LIMIT_MAX_8365MB_VC 2112
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static const int rtl8365mb_extint_port_map[] = { -1, -1, -1, -1, -1, -1, 1 };
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#define RTL8365MB_CHIP_ID_8365MB_VC 0x6367
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#define RTL8365MB_CHIP_VER_8365MB_VC 0x0040
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#define RTL8365MB_CHIP_ID_8367S 0x6367
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#define RTL8365MB_CHIP_VER_8367S 0x00A0
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/* Family-specific data and limits */
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#define RTL8365MB_PHYADDRMAX 7
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#define RTL8365MB_NUM_PHYREGS 32
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#define RTL8365MB_PHYREGMAX (RTL8365MB_NUM_PHYREGS - 1)
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#define RTL8365MB_MAX_NUM_PORTS 7
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#define RTL8365MB_PHYADDRMAX 7
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#define RTL8365MB_NUM_PHYREGS 32
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#define RTL8365MB_PHYREGMAX (RTL8365MB_NUM_PHYREGS - 1)
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/* RTL8370MB and RTL8310SR, possibly suportable by this driver, have 10 ports */
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#define RTL8365MB_MAX_NUM_PORTS 10
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#define RTL8365MB_LEARN_LIMIT_MAX 2112
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/* valid for all 6-port or less variants */
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static const int rtl8365mb_extint_port_map[] = { -1, -1, -1, -1, -1, -1, 1, 2, -1, -1};
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/* Chip identification registers */
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#define RTL8365MB_CHIP_ID_REG 0x1300
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@ -1966,9 +1973,22 @@ static int rtl8365mb_detect(struct realtek_priv *priv)
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switch (chip_id) {
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case RTL8365MB_CHIP_ID_8365MB_VC:
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dev_info(priv->dev,
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"found an RTL8365MB-VC switch (ver=0x%04x)\n",
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chip_ver);
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switch (chip_ver) {
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case RTL8365MB_CHIP_VER_8365MB_VC:
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dev_info(priv->dev,
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"found an RTL8365MB-VC switch (ver=0x%04x)\n",
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chip_ver);
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break;
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case RTL8365MB_CHIP_VER_8367S:
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dev_info(priv->dev,
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"found an RTL8367S switch (ver=0x%04x)\n",
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chip_ver);
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break;
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default:
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dev_err(priv->dev, "unrecognized switch version (ver=0x%04x)",
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chip_ver);
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return -ENODEV;
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}
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priv->num_ports = RTL8365MB_MAX_NUM_PORTS;
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@ -1976,7 +1996,7 @@ static int rtl8365mb_detect(struct realtek_priv *priv)
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mb->chip_id = chip_id;
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mb->chip_ver = chip_ver;
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mb->port_mask = GENMASK(priv->num_ports - 1, 0);
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mb->learn_limit_max = RTL8365MB_LEARN_LIMIT_MAX_8365MB_VC;
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mb->learn_limit_max = RTL8365MB_LEARN_LIMIT_MAX;
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mb->jam_table = rtl8365mb_init_jam_8365mb_vc;
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mb->jam_size = ARRAY_SIZE(rtl8365mb_init_jam_8365mb_vc);
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