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include/asm-x86/spinlock.h: checkpatch cleanups - formatting only
Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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@ -82,7 +82,7 @@ static inline void __raw_spin_lock(raw_spinlock_t *lock)
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{
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short inc = 0x0100;
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__asm__ __volatile__ (
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asm volatile (
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LOCK_PREFIX "xaddw %w0, %1\n"
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"1:\t"
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"cmpb %h0, %b0\n\t"
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@ -92,9 +92,9 @@ static inline void __raw_spin_lock(raw_spinlock_t *lock)
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/* don't need lfence here, because loads are in-order */
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"jmp 1b\n"
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"2:"
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:"+Q" (inc), "+m" (lock->slock)
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: "+Q" (inc), "+m" (lock->slock)
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:
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:"memory", "cc");
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: "memory", "cc");
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}
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#define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock)
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@ -104,30 +104,28 @@ static inline int __raw_spin_trylock(raw_spinlock_t *lock)
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int tmp;
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short new;
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asm volatile(
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"movw %2,%w0\n\t"
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"cmpb %h0,%b0\n\t"
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"jne 1f\n\t"
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"movw %w0,%w1\n\t"
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"incb %h1\n\t"
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"lock ; cmpxchgw %w1,%2\n\t"
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"1:"
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"sete %b1\n\t"
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"movzbl %b1,%0\n\t"
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:"=&a" (tmp), "=Q" (new), "+m" (lock->slock)
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:
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: "memory", "cc");
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asm volatile("movw %2,%w0\n\t"
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"cmpb %h0,%b0\n\t"
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"jne 1f\n\t"
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"movw %w0,%w1\n\t"
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"incb %h1\n\t"
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"lock ; cmpxchgw %w1,%2\n\t"
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"1:"
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"sete %b1\n\t"
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"movzbl %b1,%0\n\t"
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: "=&a" (tmp), "=Q" (new), "+m" (lock->slock)
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:
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: "memory", "cc");
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return tmp;
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}
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static inline void __raw_spin_unlock(raw_spinlock_t *lock)
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{
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__asm__ __volatile__(
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UNLOCK_LOCK_PREFIX "incb %0"
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:"+m" (lock->slock)
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:
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:"memory", "cc");
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asm volatile(UNLOCK_LOCK_PREFIX "incb %0"
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: "+m" (lock->slock)
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:
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: "memory", "cc");
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}
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#else
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static inline int __raw_spin_is_locked(raw_spinlock_t *lock)
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@ -149,21 +147,20 @@ static inline void __raw_spin_lock(raw_spinlock_t *lock)
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int inc = 0x00010000;
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int tmp;
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__asm__ __volatile__ (
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"lock ; xaddl %0, %1\n"
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"movzwl %w0, %2\n\t"
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"shrl $16, %0\n\t"
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"1:\t"
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"cmpl %0, %2\n\t"
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"je 2f\n\t"
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"rep ; nop\n\t"
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"movzwl %1, %2\n\t"
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/* don't need lfence here, because loads are in-order */
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"jmp 1b\n"
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"2:"
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:"+Q" (inc), "+m" (lock->slock), "=r" (tmp)
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:
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:"memory", "cc");
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asm volatile("lock ; xaddl %0, %1\n"
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"movzwl %w0, %2\n\t"
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"shrl $16, %0\n\t"
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"1:\t"
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"cmpl %0, %2\n\t"
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"je 2f\n\t"
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"rep ; nop\n\t"
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"movzwl %1, %2\n\t"
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/* don't need lfence here, because loads are in-order */
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"jmp 1b\n"
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"2:"
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: "+Q" (inc), "+m" (lock->slock), "=r" (tmp)
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:
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: "memory", "cc");
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}
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#define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock)
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@ -173,31 +170,29 @@ static inline int __raw_spin_trylock(raw_spinlock_t *lock)
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int tmp;
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int new;
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asm volatile(
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"movl %2,%0\n\t"
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"movl %0,%1\n\t"
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"roll $16, %0\n\t"
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"cmpl %0,%1\n\t"
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"jne 1f\n\t"
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"addl $0x00010000, %1\n\t"
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"lock ; cmpxchgl %1,%2\n\t"
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"1:"
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"sete %b1\n\t"
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"movzbl %b1,%0\n\t"
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:"=&a" (tmp), "=r" (new), "+m" (lock->slock)
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:
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: "memory", "cc");
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asm volatile("movl %2,%0\n\t"
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"movl %0,%1\n\t"
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"roll $16, %0\n\t"
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"cmpl %0,%1\n\t"
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"jne 1f\n\t"
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"addl $0x00010000, %1\n\t"
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"lock ; cmpxchgl %1,%2\n\t"
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"1:"
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"sete %b1\n\t"
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"movzbl %b1,%0\n\t"
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: "=&a" (tmp), "=r" (new), "+m" (lock->slock)
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:
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: "memory", "cc");
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return tmp;
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}
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static inline void __raw_spin_unlock(raw_spinlock_t *lock)
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{
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__asm__ __volatile__(
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UNLOCK_LOCK_PREFIX "incw %0"
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:"+m" (lock->slock)
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:
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:"memory", "cc");
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asm volatile(UNLOCK_LOCK_PREFIX "incw %0"
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: "+m" (lock->slock)
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:
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: "memory", "cc");
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}
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#endif
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