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gpio: mvebu: use BIT macro instead of bit shifting
Use the BIT macro instead of explicitly shifting bits for some added clarity. Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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@ -45,6 +45,7 @@
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#include <linux/clk.h>
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#include <linux/pinctrl/consumer.h>
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#include <linux/irqchip/chained_irq.h>
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#include <linux/bitops.h>
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/*
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* GPIO unit register offsets.
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@ -191,9 +192,9 @@ static void mvebu_gpio_set(struct gpio_chip *chip, unsigned int pin, int value)
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spin_lock_irqsave(&mvchip->lock, flags);
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u = readl_relaxed(mvebu_gpioreg_out(mvchip));
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if (value)
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u |= 1 << pin;
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u |= BIT(pin);
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else
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u &= ~(1 << pin);
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u &= ~BIT(pin);
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writel_relaxed(u, mvebu_gpioreg_out(mvchip));
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spin_unlock_irqrestore(&mvchip->lock, flags);
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}
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@ -203,7 +204,7 @@ static int mvebu_gpio_get(struct gpio_chip *chip, unsigned int pin)
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struct mvebu_gpio_chip *mvchip = gpiochip_get_data(chip);
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u32 u;
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if (readl_relaxed(mvebu_gpioreg_io_conf(mvchip)) & (1 << pin)) {
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if (readl_relaxed(mvebu_gpioreg_io_conf(mvchip)) & BIT(pin)) {
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u = readl_relaxed(mvebu_gpioreg_data_in(mvchip)) ^
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readl_relaxed(mvebu_gpioreg_in_pol(mvchip));
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} else {
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@ -223,9 +224,9 @@ static void mvebu_gpio_blink(struct gpio_chip *chip, unsigned int pin,
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spin_lock_irqsave(&mvchip->lock, flags);
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u = readl_relaxed(mvebu_gpioreg_blink(mvchip));
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if (value)
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u |= 1 << pin;
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u |= BIT(pin);
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else
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u &= ~(1 << pin);
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u &= ~BIT(pin);
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writel_relaxed(u, mvebu_gpioreg_blink(mvchip));
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spin_unlock_irqrestore(&mvchip->lock, flags);
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}
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@ -247,7 +248,7 @@ static int mvebu_gpio_direction_input(struct gpio_chip *chip, unsigned int pin)
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spin_lock_irqsave(&mvchip->lock, flags);
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u = readl_relaxed(mvebu_gpioreg_io_conf(mvchip));
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u |= 1 << pin;
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u |= BIT(pin);
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writel_relaxed(u, mvebu_gpioreg_io_conf(mvchip));
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spin_unlock_irqrestore(&mvchip->lock, flags);
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@ -275,7 +276,7 @@ static int mvebu_gpio_direction_output(struct gpio_chip *chip, unsigned int pin,
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spin_lock_irqsave(&mvchip->lock, flags);
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u = readl_relaxed(mvebu_gpioreg_io_conf(mvchip));
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u &= ~(1 << pin);
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u &= ~BIT(pin);
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writel_relaxed(u, mvebu_gpioreg_io_conf(mvchip));
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spin_unlock_irqrestore(&mvchip->lock, flags);
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@ -392,7 +393,7 @@ static int mvebu_gpio_irq_set_type(struct irq_data *d, unsigned int type)
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pin = d->hwirq;
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u = readl_relaxed(mvebu_gpioreg_io_conf(mvchip)) & (1 << pin);
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u = readl_relaxed(mvebu_gpioreg_io_conf(mvchip)) & BIT(pin);
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if (!u)
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return -EINVAL;
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@ -412,13 +413,13 @@ static int mvebu_gpio_irq_set_type(struct irq_data *d, unsigned int type)
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case IRQ_TYPE_EDGE_RISING:
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case IRQ_TYPE_LEVEL_HIGH:
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u = readl_relaxed(mvebu_gpioreg_in_pol(mvchip));
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u &= ~(1 << pin);
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u &= ~BIT(pin);
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writel_relaxed(u, mvebu_gpioreg_in_pol(mvchip));
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break;
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case IRQ_TYPE_EDGE_FALLING:
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case IRQ_TYPE_LEVEL_LOW:
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u = readl_relaxed(mvebu_gpioreg_in_pol(mvchip));
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u |= 1 << pin;
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u |= BIT(pin);
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writel_relaxed(u, mvebu_gpioreg_in_pol(mvchip));
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break;
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case IRQ_TYPE_EDGE_BOTH: {
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@ -431,10 +432,10 @@ static int mvebu_gpio_irq_set_type(struct irq_data *d, unsigned int type)
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* set initial polarity based on current input level
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*/
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u = readl_relaxed(mvebu_gpioreg_in_pol(mvchip));
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if (v & (1 << pin))
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u |= 1 << pin; /* falling */
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if (v & BIT(pin))
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u |= BIT(pin); /* falling */
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else
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u &= ~(1 << pin); /* rising */
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u &= ~BIT(pin); /* rising */
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writel_relaxed(u, mvebu_gpioreg_in_pol(mvchip));
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break;
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}
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@ -464,7 +465,7 @@ static void mvebu_gpio_irq_handler(struct irq_desc *desc)
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irq = irq_find_mapping(mvchip->domain, i);
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if (!(cause & (1 << i)))
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if (!(cause & BIT(i)))
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continue;
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type = irq_get_trigger_type(irq);
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@ -473,7 +474,7 @@ static void mvebu_gpio_irq_handler(struct irq_desc *desc)
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u32 polarity;
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polarity = readl_relaxed(mvebu_gpioreg_in_pol(mvchip));
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polarity ^= 1 << i;
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polarity ^= BIT(i);
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writel_relaxed(polarity, mvebu_gpioreg_in_pol(mvchip));
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}
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@ -510,7 +511,7 @@ static void mvebu_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
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if (!label)
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continue;
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msk = 1 << i;
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msk = BIT(i);
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is_out = !(io_conf & msk);
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seq_printf(s, " gpio-%-3d (%-20.20s)", chip->base + i, label);
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