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ARM: at91: make ecc register base soc independant
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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80e91cb802
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@ -398,8 +398,8 @@ static struct resource nand_resources[] = {
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = AT91_BASE_SYS + AT91_ECC,
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.end = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1,
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.start = AT91CAP9_BASE_ECC,
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.end = AT91CAP9_BASE_ECC + SZ_512 - 1,
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.flags = IORESOURCE_MEM,
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}
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};
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@ -399,8 +399,8 @@ static struct resource nand_resources[] = {
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = AT91_BASE_SYS + AT91_ECC,
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.end = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1,
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.start = AT91SAM9260_BASE_ECC,
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.end = AT91SAM9260_BASE_ECC + SZ_512 - 1,
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.flags = IORESOURCE_MEM,
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}
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};
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@ -473,8 +473,8 @@ static struct resource nand_resources[] = {
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = AT91_BASE_SYS + AT91_ECC0,
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.end = AT91_BASE_SYS + AT91_ECC0 + SZ_512 - 1,
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.start = AT91SAM9263_BASE_ECC0,
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.end = AT91SAM9263_BASE_ECC0 + SZ_512 - 1,
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.flags = IORESOURCE_MEM,
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}
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};
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@ -529,8 +529,8 @@ static struct resource nand_resources[] = {
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = AT91_BASE_SYS + AT91_ECC,
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.end = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1,
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.start = AT91SAM9G45_BASE_ECC,
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.end = AT91SAM9G45_BASE_ECC + SZ_512 - 1,
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.flags = IORESOURCE_MEM,
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}
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};
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@ -248,8 +248,8 @@ static struct resource nand_resources[] = {
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = AT91_BASE_SYS + AT91_ECC,
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.end = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1,
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.start = AT91SAM9RL_BASE_ECC,
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.end = AT91SAM9RL_BASE_ECC + SZ_512 - 1,
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.flags = IORESOURCE_MEM,
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}
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};
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@ -79,7 +79,6 @@
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/*
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* System Peripherals (offset from AT91_BASE_SYS)
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*/
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#define AT91_ECC (0xffffe200 - AT91_BASE_SYS)
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#define AT91_BCRAMC (0xffffe400 - AT91_BASE_SYS)
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#define AT91_DDRSDRC0 (0xffffe600 - AT91_BASE_SYS)
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#define AT91_SMC (0xffffe800 - AT91_BASE_SYS)
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@ -98,6 +97,7 @@
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(0xfffffd50 - AT91_BASE_SYS) : \
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(0xfffffd60 - AT91_BASE_SYS))
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#define AT91CAP9_BASE_ECC 0xffffe200
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#define AT91CAP9_BASE_PIOA 0xfffff200
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#define AT91CAP9_BASE_PIOB 0xfffff400
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#define AT91CAP9_BASE_PIOC 0xfffff600
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@ -80,7 +80,6 @@
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/*
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* System Peripherals (offset from AT91_BASE_SYS)
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*/
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#define AT91_ECC (0xffffe800 - AT91_BASE_SYS)
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#define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS)
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#define AT91_SMC (0xffffec00 - AT91_BASE_SYS)
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#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS)
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@ -95,6 +94,7 @@
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#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS)
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#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS)
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#define AT91SAM9260_BASE_ECC 0xffffe800
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#define AT91SAM9260_BASE_PIOA 0xfffff400
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#define AT91SAM9260_BASE_PIOB 0xfffff600
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#define AT91SAM9260_BASE_PIOC 0xfffff800
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@ -74,10 +74,8 @@
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/*
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* System Peripherals (offset from AT91_BASE_SYS)
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*/
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#define AT91_ECC0 (0xffffe000 - AT91_BASE_SYS)
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#define AT91_SDRAMC0 (0xffffe200 - AT91_BASE_SYS)
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#define AT91_SMC0 (0xffffe400 - AT91_BASE_SYS)
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#define AT91_ECC1 (0xffffe600 - AT91_BASE_SYS)
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#define AT91_SDRAMC1 (0xffffe800 - AT91_BASE_SYS)
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#define AT91_SMC1 (0xffffea00 - AT91_BASE_SYS)
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#define AT91_MATRIX (0xffffec00 - AT91_BASE_SYS)
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@ -93,6 +91,8 @@
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#define AT91_RTT1 (0xfffffd50 - AT91_BASE_SYS)
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#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS)
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#define AT91SAM9263_BASE_ECC0 0xffffe000
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#define AT91SAM9263_BASE_ECC1 0xffffe600
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#define AT91SAM9263_BASE_PIOA 0xfffff200
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#define AT91SAM9263_BASE_PIOB 0xfffff400
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#define AT91SAM9263_BASE_PIOC 0xfffff600
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@ -86,7 +86,6 @@
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/*
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* System Peripherals (offset from AT91_BASE_SYS)
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*/
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#define AT91_ECC (0xffffe200 - AT91_BASE_SYS)
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#define AT91_DDRSDRC1 (0xffffe400 - AT91_BASE_SYS)
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#define AT91_DDRSDRC0 (0xffffe600 - AT91_BASE_SYS)
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#define AT91_SMC (0xffffe800 - AT91_BASE_SYS)
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@ -103,6 +102,7 @@
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#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS)
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#define AT91_RTC (0xfffffdb0 - AT91_BASE_SYS)
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#define AT91SAM9G45_BASE_ECC 0xffffe200
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#define AT91SAM9G45_BASE_PIOA 0xfffff200
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#define AT91SAM9G45_BASE_PIOB 0xfffff400
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#define AT91SAM9G45_BASE_PIOC 0xfffff600
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@ -70,7 +70,6 @@
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* System Peripherals (offset from AT91_BASE_SYS)
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*/
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#define AT91_DMA (0xffffe600 - AT91_BASE_SYS)
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#define AT91_ECC (0xffffe800 - AT91_BASE_SYS)
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#define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS)
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#define AT91_SMC (0xffffec00 - AT91_BASE_SYS)
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#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS)
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@ -87,6 +86,7 @@
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#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS)
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#define AT91_RTC (0xfffffe00 - AT91_BASE_SYS)
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#define AT91SAM9RL_BASE_ECC 0xffffe800
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#define AT91SAM9RL_BASE_PIOA 0xfffff400
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#define AT91SAM9RL_BASE_PIOB 0xfffff600
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#define AT91SAM9RL_BASE_PIOC 0xfffff800
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