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pmdomain: mediatek: Add support for MTK_SCPD_STRICT_BUS_PROTECTION cap
This adds support for MTK_SCPD_STRICT_BUS_PROTECTION capability. It is a strict bus protection policy that requires the bus protection to be disabled before accessing the bus. This is required by the mt8365, for the MM power domain. Signed-off-by: Alexandre Bailon <abailon@baylibre.com> Signed-off-by: Fabien Parent <fparent@baylibre.com> Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com> Tested-by: Alexandre Mergnat <amergnat@baylibre.com> Link: https://lore.kernel.org/r/20230918093751.1188668-8-msp@baylibre.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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@ -262,9 +262,17 @@ static int scpsys_power_on(struct generic_pm_domain *genpd)
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regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_ISO_BIT);
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regmap_set_bits(scpsys->base, pd->data->ctl_offs, PWR_RST_B_BIT);
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ret = clk_bulk_prepare_enable(pd->num_subsys_clks, pd->subsys_clks);
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if (ret)
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goto err_pwr_ack;
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/*
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* In few Mediatek platforms(e.g. MT6779), the bus protect policy is
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* stricter, which leads to bus protect release must be prior to bus
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* access.
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*/
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if (!MTK_SCPD_CAPS(pd, MTK_SCPD_STRICT_BUS_PROTECTION)) {
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ret = clk_bulk_prepare_enable(pd->num_subsys_clks,
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pd->subsys_clks);
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if (ret)
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goto err_pwr_ack;
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}
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ret = scpsys_sram_enable(pd);
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if (ret < 0)
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@ -274,12 +282,23 @@ static int scpsys_power_on(struct generic_pm_domain *genpd)
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if (ret < 0)
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goto err_disable_sram;
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if (MTK_SCPD_CAPS(pd, MTK_SCPD_STRICT_BUS_PROTECTION)) {
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ret = clk_bulk_prepare_enable(pd->num_subsys_clks,
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pd->subsys_clks);
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if (ret)
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goto err_enable_bus_protect;
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}
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return 0;
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err_enable_bus_protect:
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scpsys_bus_protect_enable(pd);
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err_disable_sram:
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scpsys_sram_disable(pd);
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err_disable_subsys_clks:
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clk_bulk_disable_unprepare(pd->num_subsys_clks, pd->subsys_clks);
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if (!MTK_SCPD_CAPS(pd, MTK_SCPD_STRICT_BUS_PROTECTION))
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clk_bulk_disable_unprepare(pd->num_subsys_clks,
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pd->subsys_clks);
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err_pwr_ack:
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clk_bulk_disable_unprepare(pd->num_clks, pd->clks);
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err_reg:
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@ -12,6 +12,7 @@
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#define MTK_SCPD_ALWAYS_ON BIT(5)
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#define MTK_SCPD_EXT_BUCK_ISO BIT(6)
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#define MTK_SCPD_HAS_INFRA_NAO BIT(7)
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#define MTK_SCPD_STRICT_BUS_PROTECTION BIT(8)
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#define MTK_SCPD_CAPS(_scpd, _x) ((_scpd)->data->caps & (_x))
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#define SPM_VDE_PWR_CON 0x0210
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@ -107,7 +108,7 @@ struct scpsys_domain_data {
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u32 sram_pdn_ack_bits;
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int ext_buck_iso_offs;
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u32 ext_buck_iso_mask;
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u8 caps;
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u16 caps;
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const struct scpsys_bus_prot_data bp_cfg[SPM_MAX_BUS_PROT_DATA];
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int pwr_sta_offs;
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int pwr_sta2nd_offs;
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