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net: smc91x: convert pxa dma to dmaengine
Convert the dma transfers to be dmaengine based, now pxa has a dmaengine slave driver. This makes this driver a bit more PXA agnostic. The driver was tested on pxa27x (mainstone) and pxa310 (zylonite), ie. only pxa platforms. Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Cc: Russell King <linux@arm.linux.org.uk> Cc: Arnd Bergmann <arnd@arndb.de> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Robert Jarzmik
David S. Miller
parent
37d2dbcdcc
commit
d24c8f24ea
@ -2018,10 +2018,18 @@ static int smc_probe(struct net_device *dev, void __iomem *ioaddr,
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lp->cfg.flags |= SMC91X_USE_DMA;
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# endif
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if (lp->cfg.flags & SMC91X_USE_DMA) {
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int dma = pxa_request_dma(dev->name, DMA_PRIO_LOW,
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smc_pxa_dma_irq, NULL);
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if (dma >= 0)
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dev->dma = dma;
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dma_cap_mask_t mask;
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struct pxad_param param;
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dma_cap_zero(mask);
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dma_cap_set(DMA_SLAVE, mask);
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param.prio = PXAD_PRIO_LOWEST;
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param.drcmr = -1UL;
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lp->dma_chan =
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dma_request_slave_channel_compat(mask, pxad_filter_fn,
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¶m, &dev->dev,
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"data");
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}
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#endif
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@ -2032,8 +2040,8 @@ static int smc_probe(struct net_device *dev, void __iomem *ioaddr,
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version_string, revision_register & 0x0f,
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lp->base, dev->irq);
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if (dev->dma != (unsigned char)-1)
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pr_cont(" DMA %d", dev->dma);
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if (lp->dma_chan)
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pr_cont(" DMA %p", lp->dma_chan);
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pr_cont("%s%s\n",
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lp->cfg.flags & SMC91X_NOWAIT ? " [nowait]" : "",
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@ -2058,8 +2066,8 @@ static int smc_probe(struct net_device *dev, void __iomem *ioaddr,
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err_out:
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#ifdef CONFIG_ARCH_PXA
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if (retval && dev->dma != (unsigned char)-1)
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pxa_free_dma(dev->dma);
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if (retval && lp->dma_chan)
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dma_release_channel(lp->dma_chan);
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#endif
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return retval;
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}
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@ -2370,6 +2378,7 @@ static int smc_drv_probe(struct platform_device *pdev)
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struct smc_local *lp = netdev_priv(ndev);
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lp->device = &pdev->dev;
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lp->physaddr = res->start;
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}
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#endif
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@ -2406,8 +2415,8 @@ static int smc_drv_remove(struct platform_device *pdev)
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free_irq(ndev->irq, ndev);
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#ifdef CONFIG_ARCH_PXA
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if (ndev->dma != (unsigned char)-1)
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pxa_free_dma(ndev->dma);
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if (lp->dma_chan)
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dma_release_channel(lp->dma_chan);
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#endif
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iounmap(lp->base);
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@ -33,6 +33,7 @@
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#ifndef _SMC91X_H_
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#define _SMC91X_H_
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#include <linux/dmaengine.h>
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#include <linux/smc91x.h>
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/*
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@ -244,6 +245,7 @@ struct smc_local {
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u_long physaddr;
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struct device *device;
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#endif
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struct dma_chan *dma_chan;
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void __iomem *base;
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void __iomem *datacs;
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@ -265,21 +267,47 @@ struct smc_local {
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* as RX which can overrun memory and lose packets.
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*/
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#include <linux/dma-mapping.h>
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#include <mach/dma.h>
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#include <linux/dma/pxa-dma.h>
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#ifdef SMC_insl
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#undef SMC_insl
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#define SMC_insl(a, r, p, l) \
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smc_pxa_dma_insl(a, lp, r, dev->dma, p, l)
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static inline void
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smc_pxa_dma_inpump(struct smc_local *lp, u_char *buf, int len)
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{
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dma_addr_t dmabuf;
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struct dma_async_tx_descriptor *tx;
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dma_cookie_t cookie;
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enum dma_status status;
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struct dma_tx_state state;
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dmabuf = dma_map_single(lp->device, buf, len, DMA_FROM_DEVICE);
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tx = dmaengine_prep_slave_single(lp->dma_chan, dmabuf, len,
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DMA_DEV_TO_MEM, 0);
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if (tx) {
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cookie = dmaengine_submit(tx);
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dma_async_issue_pending(lp->dma_chan);
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do {
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status = dmaengine_tx_status(lp->dma_chan, cookie,
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&state);
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cpu_relax();
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} while (status != DMA_COMPLETE && status != DMA_ERROR &&
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state.residue);
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dmaengine_terminate_all(lp->dma_chan);
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}
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dma_unmap_single(lp->device, dmabuf, len, DMA_FROM_DEVICE);
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}
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static inline void
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smc_pxa_dma_insl(void __iomem *ioaddr, struct smc_local *lp, int reg, int dma,
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u_char *buf, int len)
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{
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u_long physaddr = lp->physaddr;
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dma_addr_t dmabuf;
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struct dma_slave_config config;
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int ret;
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/* fallback if no DMA available */
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if (dma == (unsigned char)-1) {
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if (!lp->dma_chan) {
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readsl(ioaddr + reg, buf, len);
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return;
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}
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@ -291,18 +319,22 @@ smc_pxa_dma_insl(void __iomem *ioaddr, struct smc_local *lp, int reg, int dma,
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len--;
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}
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memset(&config, 0, sizeof(config));
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config.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
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config.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
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config.src_addr = lp->physaddr + reg;
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config.dst_addr = lp->physaddr + reg;
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config.src_maxburst = 32;
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config.dst_maxburst = 32;
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ret = dmaengine_slave_config(lp->dma_chan, &config);
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if (ret) {
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dev_err(lp->device, "dma channel configuration failed: %d\n",
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ret);
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return;
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}
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len *= 4;
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dmabuf = dma_map_single(lp->device, buf, len, DMA_FROM_DEVICE);
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DCSR(dma) = DCSR_NODESC;
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DTADR(dma) = dmabuf;
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DSADR(dma) = physaddr + reg;
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DCMD(dma) = (DCMD_INCTRGADDR | DCMD_BURST32 |
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DCMD_WIDTH4 | (DCMD_LENGTH & len));
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DCSR(dma) = DCSR_NODESC | DCSR_RUN;
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while (!(DCSR(dma) & DCSR_STOPSTATE))
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cpu_relax();
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DCSR(dma) = 0;
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dma_unmap_single(lp->device, dmabuf, len, DMA_FROM_DEVICE);
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smc_pxa_dma_inpump(lp, buf, len);
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}
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#endif
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@ -314,11 +346,11 @@ static inline void
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smc_pxa_dma_insw(void __iomem *ioaddr, struct smc_local *lp, int reg, int dma,
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u_char *buf, int len)
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{
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u_long physaddr = lp->physaddr;
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dma_addr_t dmabuf;
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struct dma_slave_config config;
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int ret;
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/* fallback if no DMA available */
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if (dma == (unsigned char)-1) {
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if (!lp->dma_chan) {
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readsw(ioaddr + reg, buf, len);
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return;
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}
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@ -330,26 +362,25 @@ smc_pxa_dma_insw(void __iomem *ioaddr, struct smc_local *lp, int reg, int dma,
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len--;
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}
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memset(&config, 0, sizeof(config));
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config.src_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
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config.dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
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config.src_addr = lp->physaddr + reg;
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config.dst_addr = lp->physaddr + reg;
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config.src_maxburst = 32;
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config.dst_maxburst = 32;
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ret = dmaengine_slave_config(lp->dma_chan, &config);
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if (ret) {
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dev_err(lp->device, "dma channel configuration failed: %d\n",
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ret);
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return;
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}
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len *= 2;
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dmabuf = dma_map_single(lp->device, buf, len, DMA_FROM_DEVICE);
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DCSR(dma) = DCSR_NODESC;
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DTADR(dma) = dmabuf;
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DSADR(dma) = physaddr + reg;
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DCMD(dma) = (DCMD_INCTRGADDR | DCMD_BURST32 |
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DCMD_WIDTH2 | (DCMD_LENGTH & len));
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DCSR(dma) = DCSR_NODESC | DCSR_RUN;
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while (!(DCSR(dma) & DCSR_STOPSTATE))
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cpu_relax();
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DCSR(dma) = 0;
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dma_unmap_single(lp->device, dmabuf, len, DMA_FROM_DEVICE);
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smc_pxa_dma_inpump(lp, buf, len);
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}
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#endif
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static void
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smc_pxa_dma_irq(int dma, void *dummy)
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{
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DCSR(dma) = 0;
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}
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#endif /* CONFIG_ARCH_PXA */
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