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This pull request contains the following core changes:

Browse Source 
* Fix memory leaks in the core
 * Remove unused NAND locking support
 * Rename nand.h into rawnand.h (preparing support for spi NANDs)
 * Use NAND_MAX_ID_LEN where appropriate
 * Fix support for 20nm Hynix chips
 * Fix support for Samsung and Hynix SLC NANDs
 
 and the following driver changes:
 
 * Various cleanup, improvements and fixes in the qcom driver
 * Fixes for bugs detected by various static code analysis tools
 * Fix mxc ooblayout definition
 * Add a new part_parsers to tmio and sharpsl platform data in order to
   define a custom list of partition parsers
 * Request the reset line in exclusive mode in the sunxi driver
 * Fix a build error in the orion-nand driver when compiled for ARMv4
 * Allow 64-bit mvebu platforms to select the PXA3XX driver
 -----BEGIN PGP SIGNATURE-----
 
 iQJABAABCAAqBQJZpwMZIxxib3Jpcy5icmV6aWxsb25AZnJlZS1lbGVjdHJvbnMu
 Y29tAAoJEGXtNgF+CLcAJEoP/jRnEjPznWT3+ngw6k/rnykkn/wexKV3iyX/6b71
 MQT/ZFuT3HsHnUjyprPvyRWJeKun6XyIH5fk7FlXIei9TaWCt6/UGTKousaPKeR2
 maggGeEjxGVpHJM/jpIYCyjt83zpezBqTupv52XhXxPaU7ROSpuHCd92YcPzIaT5
 tcn8JrI7TGuGlBrBbA2y8ZrPtuug3IKqUfpIiQmoqr0jzQR+AbZKHg0kk5a8piOn
 OguK67uhxeOvq831bGPehCPDbuE0loNi4CssayJ1HrisfS95kH/cqrveapgKsUG/
 fxaHh1i65I0lxa8sgUgeUiU04Zsy1YcgNbCj41AY4AHnjJ0+Qp1cV6KAB/x5/wH9
 ES/fW06how+1BLEeLvOr+rIQ41WeP0qV2H3r/PtkeswKKAV3gSERBXVHmg1E7Yum
 HkmPqzhu+nSk3mP7p3yxpd7EwWQh2xpvVYrfQ5vQbtdfm8Uw9n6S8x+O89ch9wWi
 +KbMWFsmF78nuRWW3WTsaiOFKcTRLBT5RoU2z4i9hCvQT2Pnx3SBhHrIj6xqBI1S
 8MpeDdlXHmRQfZxj+jDqU77JYqVEmy/5it9OjhjMpOqxfCf4K6Nlb75TEdR5Nh/9
 BA1qqTBEslg3UqS8ofGFHGFZWrW3JHf02SYo2zU9IvBninh3HrqHiFhBc3p1xNDE
 7GwD
 =bC1+
 -----END PGP SIGNATURE-----

Merge tag 'nand/for-4.14' of git://git.infradead.org/l2-mtd into mtd/next

From Boris:
"
This pull request contains the following core changes:

* Fix memory leaks in the core
* Remove unused NAND locking support
* Rename nand.h into rawnand.h (preparing support for spi NANDs)
* Use NAND_MAX_ID_LEN where appropriate
* Fix support for 20nm Hynix chips
* Fix support for Samsung and Hynix SLC NANDs

and the following driver changes:

* Various cleanup, improvements and fixes in the qcom driver
* Fixes for bugs detected by various static code analysis tools
* Fix mxc ooblayout definition
* Add a new part_parsers to tmio and sharpsl platform data in order to
  define a custom list of partition parsers
* Request the reset line in exclusive mode in the sunxi driver
* Fix a build error in the orion-nand driver when compiled for ARMv4
* Allow 64-bit mvebu platforms to select the PXA3XX driver
"
This commit is contained in:
Boris Brezillon 2017-09-01 15:34:30 +02:00
commit d1f936d736
134 changed files with 1113 additions and 594 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

65
Documentation/devicetree/bindings/mtd/qcom_nandc.txt
View File

@ -1,11 +1,20 @@
* Qualcomm NAND controller
Required properties:
- compatible: should be "qcom,ipq806x-nand"
- compatible: must be one of the following:
* "qcom,ipq806x-nand" - for EBI2 NAND controller being used in IPQ806x
SoC and it uses ADM DMA
* "qcom,ipq4019-nand" - for QPIC NAND controller v1.4.0 being used in
IPQ4019 SoC and it uses BAM DMA
* "qcom,ipq8074-nand" - for QPIC NAND controller v1.5.0 being used in
IPQ8074 SoC and it uses BAM DMA
- reg: MMIO address range
- clocks: must contain core clock and always on clock
- clock-names: must contain "core" for the core clock and "aon" for the
always on clock
EBI2 specific properties:
- dmas: DMA specifier, consisting of a phandle to the ADM DMA
controller node and the channel number to be used for
NAND. Refer to dma.txt and qcom_adm.txt for more details
@ -16,6 +25,12 @@ Required properties:
- qcom,data-crci: must contain the ADM data type CRCI block instance
number specified for the NAND controller on the given
platform
QPIC specific properties:
- dmas: DMA specifier, consisting of a phandle to the BAM DMA
and the channel number to be used for NAND. Refer to
dma.txt, qcom_bam_dma.txt for more details
- dma-names: must contain all 3 channel names : "tx", "rx", "cmd"
- #address-cells: <1> - subnodes give the chip-select number
- #size-cells: <0>
@ -26,7 +41,6 @@ chip-selects which (may) contain NAND flash chips. Their properties are as
follows.
Required properties:
- compatible: should contain "qcom,nandcs"
- reg: a single integer representing the chip-select
number (e.g., 0, 1, 2, etc.)
- #address-cells: see partition.txt
@ -43,8 +57,8 @@ partition.txt for more detail.
Example:
nand@1ac00000 {
compatible = "qcom,ebi2-nandc";
nand-controller@1ac00000 {
compatible = "qcom,ipq806x-nand";
reg = <0x1ac00000 0x800>;
clocks = <&gcc EBI2_CLK>,
@ -59,8 +73,7 @@ nand@1ac00000 {
#address-cells = <1>;
#size-cells = <0>;
nandcs@0 {
compatible = "qcom,nandcs";
nand@0 {
reg = <0>;
nand-ecc-strength = <4>;
@ -84,3 +97,43 @@ nand@1ac00000 {
};
};
};
nand-controller@79b0000 {
compatible = "qcom,ipq4019-nand";
reg = <0x79b0000 0x1000>;
clocks = <&gcc GCC_QPIC_CLK>,
<&gcc GCC_QPIC_AHB_CLK>;
clock-names = "core", "aon";
dmas = <&qpicbam 0>,
<&qpicbam 1>,
<&qpicbam 2>;
dma-names = "tx", "rx", "cmd";
#address-cells = <1>;
#size-cells = <0>;
nand@0 {
reg = <0>;
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
nand-bus-width = <8>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "boot-nand";
reg = <0 0x58a0000>;
};
partition@58a0000 {
label = "fs-nand";
reg = <0x58a0000 0x4000000>;
};
};
};
};

8
Documentation/driver-api/mtdnand.rst
View File

@ -516,7 +516,7 @@ mirrored table is performed.
The most important field in the nand_bbt_descr structure is the
options field. The options define most of the table properties. Use the
predefined constants from nand.h to define the options.
predefined constants from rawnand.h to define the options.
- Number of bits per block
@ -843,7 +843,7 @@ Chip option constants
Constants for chip id table
~~~~~~~~~~~~~~~~~~~~~~~~~~~
These constants are defined in nand.h. They are OR-ed together to
These constants are defined in rawnand.h. They are OR-ed together to
describe the chip functionality::
/* Buswitdh is 16 bit */
@ -865,7 +865,7 @@ describe the chip functionality::
Constants for runtime options
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
These constants are defined in nand.h. They are OR-ed together to
These constants are defined in rawnand.h. They are OR-ed together to
describe the functionality::
/* The hw ecc generator provides a syndrome instead a ecc value on read
@ -956,7 +956,7 @@ developer. Each struct member has a short description which is marked
with an [XXX] identifier. See the chapter "Documentation hints" for an
explanation.
.. kernel-doc:: include/linux/mtd/nand.h
.. kernel-doc:: include/linux/mtd/rawnand.h
:internal:
Public Functions Provided

2
MAINTAINERS
View File

@ -9027,7 +9027,7 @@ T: git git://git.infradead.org/linux-mtd.git nand/fixes
T: git git://git.infradead.org/l2-mtd.git nand/next
S: Maintained
F: drivers/mtd/nand/
F: include/linux/mtd/nand*.h
F: include/linux/mtd/*nand*.h
NATIVE INSTRUMENTS USB SOUND INTERFACE DRIVER
M: Daniel Mack <zonque@gmail.com>

2
arch/arm/mach-davinci/board-da850-evm.c
View File

@ -26,7 +26,7 @@
#include <linux/input/tps6507x-ts.h>
#include <linux/mfd/tps6507x.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <linux/platform_device.h>

2
arch/arm/mach-davinci/board-dm355-evm.c
View File

@ -14,7 +14,7 @@
#include <linux/platform_device.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/i2c.h>
#include <linux/gpio.h>
#include <linux/clk.h>

2
arch/arm/mach-davinci/board-dm355-leopard.c
View File

@ -13,7 +13,7 @@
#include <linux/platform_device.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/i2c.h>
#include <linux/gpio.h>
#include <linux/clk.h>

2
arch/arm/mach-davinci/board-dm365-evm.c
View File

@ -23,7 +23,7 @@
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/slab.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/input.h>
#include <linux/spi/spi.h>
#include <linux/spi/eeprom.h>

2
arch/arm/mach-davinci/board-dm644x-evm.c
View File

@ -17,7 +17,7 @@
#include <linux/platform_data/pcf857x.h>
#include <linux/platform_data/at24.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <linux/phy.h>

2
arch/arm/mach-davinci/board-dm646x-evm.c
View File

@ -29,7 +29,7 @@
#include <media/i2c/adv7343.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/partitions.h>
#include <linux/clk.h>
#include <linux/export.h>

2
arch/arm/mach-davinci/board-sffsdr.c
View File

@ -28,7 +28,7 @@
#include <linux/i2c.h>
#include <linux/platform_data/at24.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/partitions.h>
#include <asm/mach-types.h>

2
arch/arm/mach-dove/dove-db-setup.c
View File

@ -13,7 +13,7 @@
#include <linux/platform_device.h>
#include <linux/irq.h>
#include <linux/mtd/physmap.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/timer.h>
#include <linux/ata_platform.h>
#include <linux/mv643xx_eth.h>

2
arch/arm/mach-ep93xx/snappercl15.c
View File

@ -25,7 +25,7 @@
#include <linux/fb.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <mach/hardware.h>
#include <linux/platform_data/video-ep93xx.h>

2
arch/arm/mach-ep93xx/ts72xx.c
View File

@ -16,7 +16,7 @@
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/partitions.h>
#include <mach/hardware.h>

2
arch/arm/mach-imx/mach-qong.c
View File

@ -18,7 +18,7 @@
#include <linux/memory.h>
#include <linux/platform_device.h>
#include <linux/mtd/physmap.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/gpio.h>
#include <asm/mach-types.h>

2
arch/arm/mach-ixp4xx/ixdp425-setup.c
View File

@ -17,7 +17,7 @@
#include <linux/i2c-gpio.h>
#include <linux/io.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/partitions.h>
#include <linux/delay.h>
#include <linux/gpio.h>

2
arch/arm/mach-mmp/aspenite.c
View File

@ -16,7 +16,7 @@
#include <linux/smc91x.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/interrupt.h>
#include <linux/platform_data/mv_usb.h>

2
arch/arm/mach-omap1/board-fsample.c
View File

@ -16,7 +16,7 @@
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <linux/input.h>

2
arch/arm/mach-omap1/board-h2.c
View File

@ -24,7 +24,7 @@
#include <linux/delay.h>
#include <linux/i2c.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <linux/input.h>

2
arch/arm/mach-omap1/board-h3.c
View File

@ -23,7 +23,7 @@
#include <linux/workqueue.h>
#include <linux/i2c.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <linux/input.h>

2
arch/arm/mach-omap1/board-nand.c
View File

@ -16,7 +16,7 @@
#include <linux/kernel.h>
#include <linux/io.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include "common.h"

2
arch/arm/mach-omap1/board-perseus2.c
View File

@ -16,7 +16,7 @@
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <linux/input.h>

2
arch/arm/mach-orion5x/db88f5281-setup.c
View File

@ -16,7 +16,7 @@
#include <linux/pci.h>
#include <linux/irq.h>
#include <linux/mtd/physmap.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/timer.h>
#include <linux/mv643xx_eth.h>
#include <linux/i2c.h>

2
arch/arm/mach-orion5x/kurobox_pro-setup.c
View File

@ -15,7 +15,7 @@
#include <linux/irq.h>
#include <linux/delay.h>
#include <linux/mtd/physmap.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mv643xx_eth.h>
#include <linux/i2c.h>
#include <linux/serial_reg.h>

2
arch/arm/mach-orion5x/ts209-setup.c
View File

@ -15,7 +15,7 @@
#include <linux/pci.h>
#include <linux/irq.h>
#include <linux/mtd/physmap.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mv643xx_eth.h>
#include <linux/gpio_keys.h>
#include <linux/input.h>

2
arch/arm/mach-orion5x/ts78xx-setup.c
View File

@ -16,7 +16,7 @@
#include <linux/platform_device.h>
#include <linux/mv643xx_eth.h>
#include <linux/ata_platform.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/partitions.h>
#include <linux/timeriomem-rng.h>
#include <asm/mach-types.h>

2
arch/arm/mach-pxa/balloon3.c
View File

@ -29,7 +29,7 @@
#include <linux/types.h>
#include <linux/platform_data/pcf857x.h>
#include <linux/i2c/pxa-i2c.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/physmap.h>
#include <linux/regulator/max1586.h>

2
arch/arm/mach-pxa/em-x270.c
View File

@ -15,7 +15,7 @@
#include <linux/dm9000.h>
#include <linux/platform_data/rtc-v3020.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <linux/input.h>

2
arch/arm/mach-pxa/eseries.c
View File

@ -20,7 +20,7 @@
#include <linux/mfd/tc6387xb.h>
#include <linux/mfd/tc6393xb.h>
#include <linux/mfd/t7l66xb.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/partitions.h>
#include <linux/usb/gpio_vbus.h>
#include <linux/memblock.h>

2
arch/arm/mach-pxa/palmtx.c
View File

@ -28,7 +28,7 @@
#include <linux/wm97xx.h>
#include <linux/power_supply.h>
#include <linux/usb/gpio_vbus.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/physmap.h>

2
arch/arm/mach-pxa/tosa.c
View File

@ -24,7 +24,7 @@
#include <linux/mmc/host.h>
#include <linux/mfd/tc6393xb.h>
#include <linux/mfd/tmio.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <linux/pm.h>

2
arch/arm/mach-s3c24xx/common-smdk.c
View File

@ -23,7 +23,7 @@
#include <linux/platform_device.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/nand_ecc.h>
#include <linux/mtd/partitions.h>
#include <linux/io.h>

2
arch/arm/mach-s3c24xx/mach-anubis.c
View File

@ -40,7 +40,7 @@
#include <linux/platform_data/i2c-s3c2410.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/nand_ecc.h>
#include <linux/mtd/partitions.h>

2
arch/arm/mach-s3c24xx/mach-at2440evb.c
View File

@ -41,7 +41,7 @@
#include <linux/platform_data/i2c-s3c2410.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/nand_ecc.h>
#include <linux/mtd/partitions.h>

2
arch/arm/mach-s3c24xx/mach-bast.c
View File

@ -28,7 +28,7 @@
#include <linux/serial_8250.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/nand_ecc.h>
#include <linux/mtd/partitions.h>

2
arch/arm/mach-s3c24xx/mach-gta02.c
View File

@ -50,7 +50,7 @@
#include <linux/mfd/pcf50633/pmic.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/nand_ecc.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>

2
arch/arm/mach-s3c24xx/mach-jive.c
View File

@ -43,7 +43,7 @@
#include <asm/mach-types.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/nand_ecc.h>
#include <linux/mtd/partitions.h>

2
arch/arm/mach-s3c24xx/mach-mini2440.c
View File

@ -49,7 +49,7 @@
#include <linux/platform_data/usb-s3c2410_udc.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/nand_ecc.h>
#include <linux/mtd/partitions.h>

2
arch/arm/mach-s3c24xx/mach-osiris.c
View File

@ -36,7 +36,7 @@
#include <linux/platform_data/i2c-s3c2410.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/nand_ecc.h>
#include <linux/mtd/partitions.h>

2
arch/arm/mach-s3c24xx/mach-qt2410.c
View File

@ -36,7 +36,7 @@
#include <linux/spi/spi_gpio.h>
#include <linux/io.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/nand_ecc.h>
#include <linux/mtd/partitions.h>

2
arch/arm/mach-s3c24xx/mach-rx3715.c
View File

@ -27,7 +27,7 @@
#include <linux/serial.h>
#include <linux/io.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/nand_ecc.h>
#include <linux/mtd/partitions.h>

2
arch/arm/mach-s3c24xx/mach-vstms.c
View File

@ -20,7 +20,7 @@
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/nand_ecc.h>
#include <linux/mtd/partitions.h>
#include <linux/memblock.h>

2
arch/blackfin/mach-bf537/boards/dnp5370.c
View File

@ -17,7 +17,7 @@
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/plat-ram.h>
#include <linux/mtd/physmap.h>

2
arch/blackfin/mach-bf537/boards/stamp.c
View File

@ -12,7 +12,7 @@
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/plat-ram.h>
#include <linux/mtd/physmap.h>

2
arch/blackfin/mach-bf561/boards/acvilon.c
View File

@ -38,7 +38,7 @@
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/plat-ram.h>
#include <linux/spi/spi.h>
#include <linux/spi/flash.h>

2
arch/cris/arch-v32/drivers/mach-a3/nandflash.c
View File

@ -16,7 +16,7 @@
#include <linux/init.h>
#include <linux/module.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/partitions.h>
#include <arch/memmap.h>
#include <hwregs/reg_map.h>

2
arch/cris/arch-v32/drivers/mach-fs/nandflash.c
View File

@ -16,7 +16,7 @@
#include <linux/init.h>
#include <linux/module.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/partitions.h>
#include <arch/memmap.h>
#include <hwregs/reg_map.h>

2
arch/mips/alchemy/devboards/db1200.c
View File

@ -29,7 +29,7 @@
#include <linux/leds.h>
#include <linux/mmc/host.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/partitions.h>
#include <linux/platform_device.h>
#include <linux/serial_8250.h>

2
arch/mips/alchemy/devboards/db1300.c
View File

@ -18,7 +18,7 @@
#include <linux/mmc/host.h>
#include <linux/module.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/partitions.h>
#include <linux/platform_device.h>
#include <linux/smsc911x.h>

2
arch/mips/alchemy/devboards/db1550.c
View File

@ -12,7 +12,7 @@
#include <linux/io.h>
#include <linux/interrupt.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/partitions.h>
#include <linux/platform_device.h>
#include <linux/pm.h>

2
arch/mips/include/asm/mach-jz4740/jz4740_nand.h
View File

@ -16,7 +16,7 @@
#ifndef __ASM_MACH_JZ4740_JZ4740_NAND_H__
#define __ASM_MACH_JZ4740_JZ4740_NAND_H__
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/partitions.h>
#define JZ_NAND_NUM_BANKS 4

2
arch/mips/netlogic/xlr/platform-flash.c
View File

@ -19,7 +19,7 @@
#include <linux/mtd/mtd.h>
#include <linux/mtd/physmap.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/partitions.h>
#include <asm/netlogic/haldefs.h>

2
arch/mips/pnx833x/common/platform.c
View File

@ -30,7 +30,7 @@
#include <linux/resource.h>
#include <linux/serial.h>
#include <linux/serial_pnx8xxx.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/partitions.h>
#include <irq.h>

2
arch/mips/rb532/devices.c
View File

@ -20,7 +20,7 @@
#include <linux/ctype.h>
#include <linux/string.h>
#include <linux/platform_device.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/gpio.h>

2
arch/sh/boards/mach-migor/setup.c
View File

@ -15,7 +15,7 @@
#include <linux/mmc/host.h>
#include <linux/mtd/physmap.h>
#include <linux/mfd/tmio.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/i2c.h>
#include <linux/regulator/fixed.h>
#include <linux/regulator/machine.h>

20
drivers/mtd/devices/st_spi_fsm.c
View File

@ -2073,15 +2073,17 @@ static int stfsm_probe(struct platform_device *pdev)
ret = stfsm_init(fsm);
if (ret) {
dev_err(&pdev->dev, "Failed to initialise FSM Controller\n");
return ret;
goto err_clk_unprepare;
}
stfsm_fetch_platform_configs(pdev);
/* Detect SPI FLASH device */
info = stfsm_jedec_probe(fsm);
if (!info)
return -ENODEV;
if (!info) {
ret = -ENODEV;
goto err_clk_unprepare;
}
fsm->info = info;
/* Use device size to determine address width */
@ -2095,11 +2097,11 @@ static int stfsm_probe(struct platform_device *pdev)
if (info->config) {
ret = info->config(fsm);
if (ret)
return ret;
goto err_clk_unprepare;
} else {
ret = stfsm_prepare_rwe_seqs_default(fsm);
if (ret)
return ret;
goto err_clk_unprepare;
}
fsm->mtd.name = info->name;
@ -2124,6 +2126,10 @@ static int stfsm_probe(struct platform_device *pdev)
fsm->mtd.erasesize, (fsm->mtd.erasesize >> 10));
return mtd_device_register(&fsm->mtd, NULL, 0);
err_clk_unprepare:
clk_disable_unprepare(fsm->clk);
return ret;
}
static int stfsm_remove(struct platform_device *pdev)
@ -2147,9 +2153,7 @@ static int stfsmfsm_resume(struct device *dev)
{
struct stfsm *fsm = dev_get_drvdata(dev);
clk_prepare_enable(fsm->clk);
return 0;
return clk_prepare_enable(fsm->clk);
}
#endif

2
drivers/mtd/inftlcore.c
View File

@ -33,7 +33,7 @@
#include <linux/mtd/mtd.h>
#include <linux/mtd/nftl.h>
#include <linux/mtd/inftl.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/uaccess.h>
#include <asm/errno.h>
#include <asm/io.h>

2
drivers/mtd/nand/Kconfig
View File

@ -315,7 +315,7 @@ config MTD_NAND_ATMEL
config MTD_NAND_PXA3xx
tristate "NAND support on PXA3xx and Armada 370/XP"
depends on PXA3xx || ARCH_MMP || PLAT_ORION
depends on PXA3xx || ARCH_MMP || PLAT_ORION || ARCH_MVEBU
help
This enables the driver for the NAND flash device found on
PXA3xx processors (NFCv1) and also on Armada 370/XP (NFCv2).

2
drivers/mtd/nand/ams-delta.c
View File

@ -20,7 +20,7 @@
#include <linux/module.h>
#include <linux/delay.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/partitions.h>
#include <linux/gpio.h>
#include <linux/platform_data/gpio-omap.h>

15
drivers/mtd/nand/atmel/nand-controller.c
View File

@ -59,7 +59,7 @@
#include <linux/mfd/syscon/atmel-matrix.h>
#include <linux/mfd/syscon/atmel-smc.h>
#include <linux/module.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/of_address.h>
#include <linux/of_irq.h>
#include <linux/of_platform.h>
@ -2089,8 +2089,8 @@ atmel_hsmc_nand_controller_legacy_init(struct atmel_hsmc_nand_controller *nc)
}
nc->irq = of_irq_get(nand_np, 0);
if (nc->irq < 0) {
ret = nc->irq;
if (nc->irq <= 0) {
ret = nc->irq ?: -ENXIO;
if (ret != -EPROBE_DEFER)
dev_err(dev, "Failed to get IRQ number (err = %d)\n",
ret);
@ -2179,11 +2179,12 @@ atmel_hsmc_nand_controller_init(struct atmel_hsmc_nand_controller *nc)
nc->irq = of_irq_get(np, 0);
of_node_put(np);
if (nc->irq < 0) {
if (nc->irq != -EPROBE_DEFER)
if (nc->irq <= 0) {
ret = nc->irq ?: -ENXIO;
if (ret != -EPROBE_DEFER)
dev_err(dev, "Failed to get IRQ number (err = %d)\n",
nc->irq);
return nc->irq;
ret);
return ret;
}
np = of_parse_phandle(dev->of_node, "atmel,nfc-io", 0);

2
drivers/mtd/nand/atmel/pmecc.c
View File

@ -47,7 +47,7 @@
#include <linux/genalloc.h>
#include <linux/iopoll.h>
#include <linux/module.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/of_irq.h>
#include <linux/of_platform.h>
#include <linux/platform_device.h>

2
drivers/mtd/nand/au1550nd.c
View File

@ -14,7 +14,7 @@
#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/partitions.h>
#include <linux/platform_device.h>
#include <asm/io.h>

2
drivers/mtd/nand/bcm47xxnflash/bcm47xxnflash.h
View File

@ -6,7 +6,7 @@
#endif
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
struct bcm47xxnflash {
struct bcma_drv_cc *cc;

2
drivers/mtd/nand/bf5xx_nand.c
View File

@ -49,7 +49,7 @@
#include <linux/bitops.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/nand_ecc.h>
#include <linux/mtd/partitions.h>

2
drivers/mtd/nand/brcmnand/brcmnand.c
View File

@ -29,7 +29,7 @@
#include <linux/bitops.h>
#include <linux/mm.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/partitions.h>
#include <linux/of.h>
#include <linux/of_platform.h>

2
drivers/mtd/nand/cafe_nand.c
View File

@ -13,7 +13,7 @@
#include <linux/device.h>
#undef DEBUG
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/partitions.h>
#include <linux/rslib.h>
#include <linux/pci.h>

2
drivers/mtd/nand/cmx270_nand.c
View File

@ -18,7 +18,7 @@
* CM-X270 board.
*/
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/partitions.h>
#include <linux/slab.h>
#include <linux/gpio.h>

2
drivers/mtd/nand/cs553x_nand.c
View File

@ -24,7 +24,7 @@
#include <linux/module.h>
#include <linux/delay.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/nand_ecc.h>
#include <linux/mtd/partitions.h>

2
drivers/mtd/nand/davinci_nand.c
View File

@ -29,7 +29,7 @@
#include <linux/err.h>
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/partitions.h>
#include <linux/slab.h>
#include <linux/of_device.h>

2
drivers/mtd/nand/denali.h
View File

@ -21,7 +21,7 @@
#define __DENALI_H__
#include <linux/bitops.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#define DEVICE_RESET 0x0
#define DEVICE_RESET__BANK(bank) BIT(bank)

4
drivers/mtd/nand/denali_dt.c
View File

@ -118,7 +118,9 @@ static int denali_dt_probe(struct platform_device *pdev)
dev_err(&pdev->dev, "no clk available\n");
return PTR_ERR(dt->clk);
}
clk_prepare_enable(dt->clk);
ret = clk_prepare_enable(dt->clk);
if (ret)
return ret;
denali->clk_x_rate = clk_get_rate(dt->clk);

2
drivers/mtd/nand/diskonchip.c
View File

@ -27,7 +27,7 @@
#include <linux/io.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/doc2000.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/inftl.h>

2
drivers/mtd/nand/docg4.c
View File

@ -41,7 +41,7 @@
#include <linux/bitops.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/bch.h>
#include <linux/bitrev.h>
#include <linux/jiffies.h>

2
drivers/mtd/nand/fsl_elbc_nand.c
View File

@ -34,7 +34,7 @@
#include <linux/interrupt.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/nand_ecc.h>
#include <linux/mtd/partitions.h>

2
drivers/mtd/nand/fsl_ifc_nand.c
View File

@ -26,7 +26,7 @@
#include <linux/of_address.h>
#include <linux/slab.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/nand_ecc.h>
#include <linux/fsl_ifc.h>

2
drivers/mtd/nand/fsl_upm.c
View File

@ -14,7 +14,7 @@
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/delay.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/nand_ecc.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/mtd.h>

2
drivers/mtd/nand/fsmc_nand.c
View File

@ -28,7 +28,7 @@
#include <linux/sched.h>
#include <linux/types.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/nand_ecc.h>
#include <linux/platform_device.h>
#include <linux/of.h>

2
drivers/mtd/nand/gpio.c
View File

@ -26,7 +26,7 @@
#include <linux/gpio.h>
#include <linux/io.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/nand-gpio.h>
#include <linux/of.h>

2
drivers/mtd/nand/gpmi-nand/gpmi-nand.h
View File

@ -17,7 +17,7 @@
#ifndef __DRIVERS_MTD_NAND_GPMI_NAND_H
#define __DRIVERS_MTD_NAND_GPMI_NAND_H
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>
#include <linux/dmaengine.h>

2
drivers/mtd/nand/hisi504_nand.c
View File

@ -26,7 +26,7 @@
#include <linux/module.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/dma-mapping.h>
#include <linux/platform_device.h>
#include <linux/mtd/partitions.h>

2
drivers/mtd/nand/jz4740_nand.c
View File

@ -20,7 +20,7 @@
#include <linux/slab.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/partitions.h>
#include <linux/gpio.h>

2
drivers/mtd/nand/jz4780_nand.c
View File

@ -20,7 +20,7 @@
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/partitions.h>
#include <linux/jz4780-nemc.h>

11
drivers/mtd/nand/lpc32xx_mlc.c
View File

@ -27,7 +27,7 @@
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/partitions.h>
#include <linux/clk.h>
#include <linux/err.h>
@ -705,7 +705,9 @@ static int lpc32xx_nand_probe(struct platform_device *pdev)
res = -ENOENT;
goto err_exit1;
}
clk_prepare_enable(host->clk);
res = clk_prepare_enable(host->clk);
if (res)
goto err_exit1;
nand_chip->cmd_ctrl = lpc32xx_nand_cmd_ctrl;
nand_chip->dev_ready = lpc32xx_nand_device_ready;
@ -846,9 +848,12 @@ static int lpc32xx_nand_remove(struct platform_device *pdev)
static int lpc32xx_nand_resume(struct platform_device *pdev)
{
struct lpc32xx_nand_host *host = platform_get_drvdata(pdev);
int ret;
/* Re-enable NAND clock */
clk_prepare_enable(host->clk);
ret = clk_prepare_enable(host->clk);
if (ret)
return ret;
/* Fresh init of NAND controller */
lpc32xx_nand_setup(host);

11
drivers/mtd/nand/lpc32xx_slc.c
View File

@ -23,7 +23,7 @@
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/partitions.h>
#include <linux/clk.h>
#include <linux/err.h>
@ -840,7 +840,9 @@ static int lpc32xx_nand_probe(struct platform_device *pdev)
res = -ENOENT;
goto err_exit1;
}
clk_prepare_enable(host->clk);
res = clk_prepare_enable(host->clk);
if (res)
goto err_exit1;
/* Set NAND IO addresses and command/ready functions */
chip->IO_ADDR_R = SLC_DATA(host->io_base);
@ -972,9 +974,12 @@ static int lpc32xx_nand_remove(struct platform_device *pdev)
static int lpc32xx_nand_resume(struct platform_device *pdev)
{
struct lpc32xx_nand_host *host = platform_get_drvdata(pdev);
int ret;
/* Re-enable NAND clock */
clk_prepare_enable(host->clk);
ret = clk_prepare_enable(host->clk);
if (ret)
return ret;
/* Fresh init of NAND controller */
lpc32xx_nand_setup(host);

2
drivers/mtd/nand/mpc5121_nfc.c
View File

@ -33,7 +33,7 @@
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/partitions.h>
#include <linux/of_address.h>
#include <linux/of_device.h>

4
drivers/mtd/nand/mtk_ecc.c
View File

@ -464,8 +464,8 @@ static int mtk_ecc_probe(struct platform_device *pdev)
irq = platform_get_irq(pdev, 0);
if (irq < 0) {
dev_err(dev, "failed to get irq\n");
return -EINVAL;
dev_err(dev, "failed to get irq: %d\n", irq);
return irq;
}
ret = dma_set_mask(dev, DMA_BIT_MASK(32));

2
drivers/mtd/nand/mtk_nand.c
View File

@ -19,7 +19,7 @@
#include <linux/interrupt.h>
#include <linux/delay.h>
#include <linux/clk.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/mtd.h>
#include <linux/module.h>
#include <linux/iopoll.h>

9
drivers/mtd/nand/mxc_nand.c
View File

@ -22,7 +22,7 @@
#include <linux/init.h>
#include <linux/module.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/partitions.h>
#include <linux/interrupt.h>
#include <linux/device.h>
@ -876,6 +876,8 @@ static void mxc_do_addr_cycle(struct mtd_info *mtd, int column, int page_addr)
}
}
#define MXC_V1_ECCBYTES 5
static int mxc_v1_ooblayout_ecc(struct mtd_info *mtd, int section,
struct mtd_oob_region *oobregion)
{
@ -885,7 +887,7 @@ static int mxc_v1_ooblayout_ecc(struct mtd_info *mtd, int section,
return -ERANGE;
oobregion->offset = (section * 16) + 6;
oobregion->length = nand_chip->ecc.bytes;
oobregion->length = MXC_V1_ECCBYTES;
return 0;
}
@ -907,8 +909,7 @@ static int mxc_v1_ooblayout_free(struct mtd_info *mtd, int section,
oobregion->length = 4;
}
} else {
oobregion->offset = ((section - 1) * 16) +
nand_chip->ecc.bytes + 6;
oobregion->offset = ((section - 1) * 16) + MXC_V1_ECCBYTES + 6;
if (section < nand_chip->ecc.steps)
oobregion->length = (section * 16) + 6 -
oobregion->offset;

2
drivers/mtd/nand/nand_amd.c
View File

@ -15,7 +15,7 @@
* GNU General Public License for more details.
*/
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
static void amd_nand_decode_id(struct nand_chip *chip)
{

304
drivers/mtd/nand/nand_base.c
View File

@ -39,7 +39,7 @@
#include <linux/nmi.h>
#include <linux/types.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/nand_ecc.h>
#include <linux/mtd/nand_bch.h>
#include <linux/interrupt.h>
@ -1247,179 +1247,6 @@ int nand_reset(struct nand_chip *chip, int chipnr)
return 0;
}
/**
* __nand_unlock - [REPLACEABLE] unlocks specified locked blocks
* @mtd: mtd info
* @ofs: offset to start unlock from
* @len: length to unlock
* @invert:
* - when = 0, unlock the range of blocks within the lower and
* upper boundary address
* - when = 1, unlock the range of blocks outside the boundaries
* of the lower and upper boundary address
*
* Returs unlock status.
*/
static int __nand_unlock(struct mtd_info *mtd, loff_t ofs,
uint64_t len, int invert)
{
int ret = 0;
int status, page;
struct nand_chip *chip = mtd_to_nand(mtd);
/* Submit address of first page to unlock */
page = ofs >> chip->page_shift;
chip->cmdfunc(mtd, NAND_CMD_UNLOCK1, -1, page & chip->pagemask);
/* Submit address of last page to unlock */
page = (ofs + len) >> chip->page_shift;
chip->cmdfunc(mtd, NAND_CMD_UNLOCK2, -1,
(page | invert) & chip->pagemask);
/* Call wait ready function */
status = chip->waitfunc(mtd, chip);
/* See if device thinks it succeeded */
if (status & NAND_STATUS_FAIL) {
pr_debug("%s: error status = 0x%08x\n",
__func__, status);
ret = -EIO;
}
return ret;
}
/**
* nand_unlock - [REPLACEABLE] unlocks specified locked blocks
* @mtd: mtd info
* @ofs: offset to start unlock from
* @len: length to unlock
*
* Returns unlock status.
*/
int nand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
{
int ret = 0;
int chipnr;
struct nand_chip *chip = mtd_to_nand(mtd);
pr_debug("%s: start = 0x%012llx, len = %llu\n",
__func__, (unsigned long long)ofs, len);
if (check_offs_len(mtd, ofs, len))
return -EINVAL;
/* Align to last block address if size addresses end of the device */
if (ofs + len == mtd->size)
len -= mtd->erasesize;
nand_get_device(mtd, FL_UNLOCKING);
/* Shift to get chip number */
chipnr = ofs >> chip->chip_shift;
/*
* Reset the chip.
* If we want to check the WP through READ STATUS and check the bit 7
* we must reset the chip
* some operation can also clear the bit 7 of status register
* eg. erase/program a locked block
*/
nand_reset(chip, chipnr);
chip->select_chip(mtd, chipnr);
/* Check, if it is write protected */
if (nand_check_wp(mtd)) {
pr_debug("%s: device is write protected!\n",
__func__);
ret = -EIO;
goto out;
}
ret = __nand_unlock(mtd, ofs, len, 0);
out:
chip->select_chip(mtd, -1);
nand_release_device(mtd);
return ret;
}
EXPORT_SYMBOL(nand_unlock);
/**
* nand_lock - [REPLACEABLE] locks all blocks present in the device
* @mtd: mtd info
* @ofs: offset to start unlock from
* @len: length to unlock
*
* This feature is not supported in many NAND parts. 'Micron' NAND parts do
* have this feature, but it allows only to lock all blocks, not for specified
* range for block. Implementing 'lock' feature by making use of 'unlock', for
* now.
*
* Returns lock status.
*/
int nand_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
{
int ret = 0;
int chipnr, status, page;
struct nand_chip *chip = mtd_to_nand(mtd);
pr_debug("%s: start = 0x%012llx, len = %llu\n",
__func__, (unsigned long long)ofs, len);
if (check_offs_len(mtd, ofs, len))
return -EINVAL;
nand_get_device(mtd, FL_LOCKING);
/* Shift to get chip number */
chipnr = ofs >> chip->chip_shift;
/*
* Reset the chip.
* If we want to check the WP through READ STATUS and check the bit 7
* we must reset the chip
* some operation can also clear the bit 7 of status register
* eg. erase/program a locked block
*/
nand_reset(chip, chipnr);
chip->select_chip(mtd, chipnr);
/* Check, if it is write protected */
if (nand_check_wp(mtd)) {
pr_debug("%s: device is write protected!\n",
__func__);
status = MTD_ERASE_FAILED;
ret = -EIO;
goto out;
}
/* Submit address of first page to lock */
page = ofs >> chip->page_shift;
chip->cmdfunc(mtd, NAND_CMD_LOCK, -1, page & chip->pagemask);
/* Call wait ready function */
status = chip->waitfunc(mtd, chip);
/* See if device thinks it succeeded */
if (status & NAND_STATUS_FAIL) {
pr_debug("%s: error status = 0x%08x\n",
__func__, status);
ret = -EIO;
goto out;
}
ret = __nand_unlock(mtd, ofs, len, 0x1);
out:
chip->select_chip(mtd, -1);
nand_release_device(mtd);
return ret;
}
EXPORT_SYMBOL(nand_lock);
/**
* nand_check_erased_buf - check if a buffer contains (almost) only 0xff data
* @buf: buffer to test
@ -3993,10 +3820,13 @@ static void nand_manufacturer_detect(struct nand_chip *chip)
* nand_decode_ext_id() otherwise.
*/
if (chip->manufacturer.desc && chip->manufacturer.desc->ops &&
chip->manufacturer.desc->ops->detect)
chip->manufacturer.desc->ops->detect) {
/* The 3rd id byte holds MLC / multichip data */
chip->bits_per_cell = nand_get_bits_per_cell(chip->id.data[2]);
chip->manufacturer.desc->ops->detect(chip);
else
} else {
nand_decode_ext_id(chip);
}
}
/*
@ -4036,7 +3866,7 @@ static int nand_detect(struct nand_chip *chip, struct nand_flash_dev *type)
const struct nand_manufacturer *manufacturer;
struct mtd_info *mtd = nand_to_mtd(chip);
int busw;
int i, ret;
int i;
u8 *id_data = chip->id.data;
u8 maf_id, dev_id;
@ -4066,7 +3896,7 @@ static int nand_detect(struct nand_chip *chip, struct nand_flash_dev *type)
chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
/* Read entire ID string */
for (i = 0; i < 8; i++)
for (i = 0; i < ARRAY_SIZE(chip->id.data); i++)
id_data[i] = chip->read_byte(mtd);
if (id_data[0] != maf_id || id_data[1] != dev_id) {
@ -4075,7 +3905,7 @@ static int nand_detect(struct nand_chip *chip, struct nand_flash_dev *type)
return -ENODEV;
}
chip->id.len = nand_id_len(id_data, 8);
chip->id.len = nand_id_len(id_data, ARRAY_SIZE(chip->id.data));
/* Try to identify manufacturer */
manufacturer = nand_get_manufacturer(maf_id);
@ -4177,10 +4007,6 @@ ident_done:
if (mtd->writesize > 512 && chip->cmdfunc == nand_command)
chip->cmdfunc = nand_command_lp;
ret = nand_manufacturer_init(chip);
if (ret)
return ret;
pr_info("device found, Manufacturer ID: 0x%02x, Chip ID: 0x%02x\n",
maf_id, dev_id);
@ -4388,23 +4214,6 @@ int nand_scan_ident(struct mtd_info *mtd, int maxchips,
return ret;
}
/* Initialize the ->data_interface field. */
ret = nand_init_data_interface(chip);
if (ret)
goto err_nand_init;
/*
* Setup the data interface correctly on the chip and controller side.
* This explicit call to nand_setup_data_interface() is only required
* for the first die, because nand_reset() has been called before
* ->data_interface and ->default_onfi_timing_mode were set.
* For the other dies, nand_reset() will automatically switch to the
* best mode for us.
*/
ret = nand_setup_data_interface(chip, 0);
if (ret)
goto err_nand_init;
nand_maf_id = chip->id.data[0];
nand_dev_id = chip->id.data[1];
@ -4434,12 +4243,6 @@ int nand_scan_ident(struct mtd_info *mtd, int maxchips,
mtd->size = i * chip->chipsize;
return 0;
err_nand_init:
/* Free manufacturer priv data. */
nand_manufacturer_cleanup(chip);
return ret;
}
EXPORT_SYMBOL(nand_scan_ident);
@ -4826,55 +4629,60 @@ int nand_scan_tail(struct mtd_info *mtd)
struct nand_chip *chip = mtd_to_nand(mtd);
struct nand_ecc_ctrl *ecc = &chip->ecc;
struct nand_buffers *nbuf = NULL;
int ret;
int ret, i;
/* New bad blocks should be marked in OOB, flash-based BBT, or both */
if (WARN_ON((chip->bbt_options & NAND_BBT_NO_OOB_BBM) &&
!(chip->bbt_options & NAND_BBT_USE_FLASH))) {
ret = -EINVAL;
goto err_ident;
return -EINVAL;
}
if (invalid_ecc_page_accessors(chip)) {
pr_err("Invalid ECC page accessors setup\n");
ret = -EINVAL;
goto err_ident;
return -EINVAL;
}
if (!(chip->options & NAND_OWN_BUFFERS)) {
nbuf = kzalloc(sizeof(*nbuf), GFP_KERNEL);
if (!nbuf) {
ret = -ENOMEM;
goto err_ident;
}
if (!nbuf)
return -ENOMEM;
nbuf->ecccalc = kmalloc(mtd->oobsize, GFP_KERNEL);
if (!nbuf->ecccalc) {
ret = -ENOMEM;
goto err_free;
goto err_free_nbuf;
}
nbuf->ecccode = kmalloc(mtd->oobsize, GFP_KERNEL);
if (!nbuf->ecccode) {
ret = -ENOMEM;
goto err_free;
goto err_free_nbuf;
}
nbuf->databuf = kmalloc(mtd->writesize + mtd->oobsize,
GFP_KERNEL);
if (!nbuf->databuf) {
ret = -ENOMEM;
goto err_free;
goto err_free_nbuf;
}
chip->buffers = nbuf;
} else {
if (!chip->buffers) {
ret = -ENOMEM;
goto err_ident;
}
} else if (!chip->buffers) {
return -ENOMEM;
}
/*
* FIXME: some NAND manufacturer drivers expect the first die to be
* selected when manufacturer->init() is called. They should be fixed
* to explictly select the relevant die when interacting with the NAND
* chip.
*/
chip->select_chip(mtd, 0);
ret = nand_manufacturer_init(chip);
chip->select_chip(mtd, -1);
if (ret)
goto err_free_nbuf;
/* Set the internal oob buffer location, just after the page data */
chip->oob_poi = chip->buffers->databuf + mtd->writesize;
@ -4896,7 +4704,7 @@ int nand_scan_tail(struct mtd_info *mtd)
WARN(1, "No oob scheme defined for oobsize %d\n",
mtd->oobsize);
ret = -EINVAL;
goto err_free;
goto err_nand_manuf_cleanup;
}
}
@ -4911,7 +4719,7 @@ int nand_scan_tail(struct mtd_info *mtd)
if (!ecc->calculate || !ecc->correct || !ecc->hwctl) {
WARN(1, "No ECC functions supplied; hardware ECC not possible\n");
ret = -EINVAL;
goto err_free;
goto err_nand_manuf_cleanup;
}
if (!ecc->read_page)
ecc->read_page = nand_read_page_hwecc_oob_first;
@ -4943,7 +4751,7 @@ int nand_scan_tail(struct mtd_info *mtd)
ecc->write_page == nand_write_page_hwecc)) {
WARN(1, "No ECC functions supplied; hardware ECC not possible\n");
ret = -EINVAL;
goto err_free;
goto err_nand_manuf_cleanup;
}
/* Use standard syndrome read/write page function? */
if (!ecc->read_page)
@ -4963,7 +4771,7 @@ int nand_scan_tail(struct mtd_info *mtd)
if (!ecc->strength) {
WARN(1, "Driver must set ecc.strength when using hardware ECC\n");
ret = -EINVAL;
goto err_free;
goto err_nand_manuf_cleanup;
}
break;
}
@ -4976,7 +4784,7 @@ int nand_scan_tail(struct mtd_info *mtd)
ret = nand_set_ecc_soft_ops(mtd);
if (ret) {
ret = -EINVAL;
goto err_free;
goto err_nand_manuf_cleanup;
}
break;
@ -4984,7 +4792,7 @@ int nand_scan_tail(struct mtd_info *mtd)
if (!ecc->read_page || !ecc->write_page) {
WARN(1, "No ECC functions supplied; on-die ECC not possible\n");
ret = -EINVAL;
goto err_free;
goto err_nand_manuf_cleanup;
}
if (!ecc->read_oob)
ecc->read_oob = nand_read_oob_std;
@ -5008,7 +4816,7 @@ int nand_scan_tail(struct mtd_info *mtd)
default:
WARN(1, "Invalid NAND_ECC_MODE %d\n", ecc->mode);
ret = -EINVAL;
goto err_free;
goto err_nand_manuf_cleanup;
}
/* For many systems, the standard OOB write also works for raw */
@ -5029,13 +4837,13 @@ int nand_scan_tail(struct mtd_info *mtd)
if (ecc->steps * ecc->size != mtd->writesize) {
WARN(1, "Invalid ECC parameters\n");
ret = -EINVAL;
goto err_free;
goto err_nand_manuf_cleanup;
}
ecc->total = ecc->steps * ecc->bytes;
if (ecc->total > mtd->oobsize) {
WARN(1, "Total number of ECC bytes exceeded oobsize\n");
ret = -EINVAL;
goto err_free;
goto err_nand_manuf_cleanup;
}
/*
@ -5117,6 +4925,21 @@ int nand_scan_tail(struct mtd_info *mtd)
if (!mtd->bitflip_threshold)
mtd->bitflip_threshold = DIV_ROUND_UP(mtd->ecc_strength * 3, 4);
/* Initialize the ->data_interface field. */
ret = nand_init_data_interface(chip);
if (ret)
goto err_nand_manuf_cleanup;
/* Enter fastest possible mode on all dies. */
for (i = 0; i < chip->numchips; i++) {
chip->select_chip(mtd, i);
ret = nand_setup_data_interface(chip, i);
chip->select_chip(mtd, -1);
if (ret)
goto err_nand_data_iface_cleanup;
}
/* Check, if we should skip the bad block table scan */
if (chip->options & NAND_SKIP_BBTSCAN)
return 0;
@ -5124,10 +4947,17 @@ int nand_scan_tail(struct mtd_info *mtd)
/* Build bad block table */
ret = chip->scan_bbt(mtd);
if (ret)
goto err_free;
goto err_nand_data_iface_cleanup;
return 0;
err_free:
err_nand_data_iface_cleanup:
nand_release_data_interface(chip);
err_nand_manuf_cleanup:
nand_manufacturer_cleanup(chip);
err_free_nbuf:
if (nbuf) {
kfree(nbuf->databuf);
kfree(nbuf->ecccode);
@ -5135,12 +4965,6 @@ err_free:
kfree(nbuf);
}
err_ident:
/* Clean up nand_scan_ident(). */
/* Free manufacturer priv data. */
nand_manufacturer_cleanup(chip);
return ret;
}
EXPORT_SYMBOL(nand_scan_tail);

2
drivers/mtd/nand/nand_bbt.c
View File

@ -61,7 +61,7 @@
#include <linux/types.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/bbm.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/bitops.h>
#include <linux/delay.h>
#include <linux/vmalloc.h>

2
drivers/mtd/nand/nand_bch.c
View File

@ -25,7 +25,7 @@
#include <linux/slab.h>
#include <linux/bitops.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/nand_bch.h>
#include <linux/bch.h>

2
drivers/mtd/nand/nand_ecc.c
View File

@ -43,7 +43,7 @@
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/nand_ecc.h>
#include <asm/byteorder.h>
#else

6
drivers/mtd/nand/nand_hynix.c
View File

@ -15,7 +15,7 @@
* GNU General Public License for more details.
*/
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/sizes.h>
#include <linux/slab.h>
@ -477,7 +477,7 @@ static void hynix_nand_extract_ecc_requirements(struct nand_chip *chip,
* The ECC requirements field meaning depends on the
* NAND technology.
*/
u8 nand_tech = chip->id.data[5] & 0x3;
u8 nand_tech = chip->id.data[5] & 0x7;
if (nand_tech < 3) {
/* > 26nm, reference: H27UBG8T2A datasheet */
@ -533,7 +533,7 @@ static void hynix_nand_extract_scrambling_requirements(struct nand_chip *chip,
if (nand_tech > 0)
chip->options |= NAND_NEED_SCRAMBLING;
} else {
nand_tech = chip->id.data[5] & 0x3;
nand_tech = chip->id.data[5] & 0x7;
/* < 32nm */
if (nand_tech > 2)

2
drivers/mtd/nand/nand_ids.c
View File

@ -6,7 +6,7 @@
* published by the Free Software Foundation.
*
*/
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/sizes.h>
#define LP_OPTIONS 0

2
drivers/mtd/nand/nand_macronix.c
View File

@ -15,7 +15,7 @@
* GNU General Public License for more details.
*/
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
static int macronix_nand_init(struct nand_chip *chip)
{

2
drivers/mtd/nand/nand_micron.c
View File

@ -15,7 +15,7 @@
* GNU General Public License for more details.
*/
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
/*
* Special Micron status bit that indicates when the block has been

2
drivers/mtd/nand/nand_samsung.c
View File

@ -15,7 +15,7 @@
* GNU General Public License for more details.
*/
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
static void samsung_nand_decode_id(struct nand_chip *chip)
{

2
drivers/mtd/nand/nand_timings.c
View File

@ -11,7 +11,7 @@
#include <linux/kernel.h>
#include <linux/err.h>
#include <linux/export.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
static const struct nand_data_interface onfi_sdr_timings[] = {
/* Mode 0 */

2
drivers/mtd/nand/nand_toshiba.c
View File

@ -15,7 +15,7 @@
* GNU General Public License for more details.
*/
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
static void toshiba_nand_decode_id(struct nand_chip *chip)
{

2
drivers/mtd/nand/nandsim.c
View File

@ -33,7 +33,7 @@
#include <linux/errno.h>
#include <linux/string.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/nand_bch.h>
#include <linux/mtd/partitions.h>
#include <linux/delay.h>

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